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Xilinx, Inc. (NASDAQ:XLNX)

2013 Investor Day

March 05, 2013 2:00 pm ET

Executives

Rick Muscha

Moshe N. Gavrielov - Chief Executive Officer, President and Director

Victor Peng - Senior Vice President of Programmable Platforms Group

Krishna Rangasayee - Senior Vice President and General Manager of Communications Business Unit

Jon A. Olson - Chief Financial Officer, Principal Accounting Officer and Senior Vice President of Finance

Analysts

Vivek Arya - BofA Merrill Lynch, Research Division

Romit J. Shah - Nomura Securities Co. Ltd., Research Division

Christopher B. Danely - JP Morgan Chase & Co, Research Division

James Schneider - Goldman Sachs Group Inc., Research Division

Ian Ing - Lazard Capital Markets LLC, Research Division

Ambrish Srivastava - BMO Capital Markets U.S.

John W. Pitzer - Crédit Suisse AG, Research Division

Steven Eliscu - UBS Investment Bank, Research Division

Stacy A. Rasgon - Sanford C. Bernstein & Co., LLC., Research Division

Sumit Dhanda - ISI Group Inc., Research Division

Parker Paulin - Wells Fargo Securities, LLC, Research Division

William Stein - SunTrust Robinson Humphrey, Inc., Research Division

Anil K. Doradla - William Blair & Company L.L.C., Research Division

Rick Muscha

All right. Good afternoon, everyone, and welcome to the Xilinx 2013 Investor Day. I'd like to also welcome those listening on the webcast. We're very appreciative of your time today and your interest in the company. My name is Rick Muscha from Investor Relations.

And at this time, let me go ahead and introduce the management team that's with us today. Moshe Gavrielov, President and CEO; Krishna Rangasayee, Senior Vice President and General Manager of our Communications Business Unit; Jon Olson, Senior Vice President and Chief Financial Officer; Victor Peng, Senior Vice President, Programs Platforms Group; and Steve Glaser, Senior Vice President of Corporate Strategy and Marketing. We also have our Vice President and Corporate Controller, Lorenzo Flores somewhere back there; and my colleague in Investor Relations, Lori Owen.

To the extent that we do make some forward-looking statements in our presentation, I'd like you to acknowledge this very well-written Safe Harbor disclaimer statement. And then next, I would naturally refer you to our most recently filed 10-Q where you'll find all the factors that could cause actual results to differ materially from what we say today.

Our agenda will feature 4 speakers. So Moshe will describe how Xilinx is enabling all programmable and smarter systems. Victor will then discuss how Xilinx is a generation ahead and how we plan to stay a generation ahead. Krishna will then describe how Xilinx is capitalizing on the industry megatrends and ASIC ASSP displacement for growth. Jon then will talk about how we plan to drive growth with investment leverage. Jon will also have -- will provide the fiscal year '14 guidance at the back of his presentation. Following the prepared presentation, we'll have plenty of time for Q&A, which Jon will be moderating. We'll have a couple of roving live handheld microphones throughout, so your questions can be heard on the webcast. Following the Q&A, we'll have a reception just straight back to those double doors, give you a chance to mingle with the management team. And at the same time, we've got representatives from some of our key end markets, as well as the Vivado Design Suite and a couple of other demos that would give you the opportunity to maybe dig a little bit deeper, understand some of the competitive advantages, the key applications, where we're winning, et cetera.

A couple of housekeeping items. The restrooms, if you haven't already seen them, they're right next to the registration desk as you walk in. And at the end of the presentation, on your way out, please help yourself to a copy of our presentation today. Those will be on the registration desk.

And actually I would want to remind everyone that today is meant to be a strategic presentation. So we're really not going to focus on the March quarter or June quarter business dynamics.

And with that, it is my pleasure to introduce Moshe Gavrielov, President and CEO. Moshe?

Moshe N. Gavrielov

Good afternoon, everyone, and welcome. Welcome to our annual Analyst Day. Last year, for those of you who have long memories, we gave out David Petraeus' All In book, and we figured that it would be a lot less expensive and actually quite a bit cheaper to give you this set of [indiscernible] that you all have, which paradoxically are called Irony. So there might be a message in the name, on the [indiscernible] here.

Okay, well, welcome again, and thanks for joining us. What I would like to do is to talk a little about market expansion, what we're doing in order to expand the market we service and our customer base.

So Xilinx has moved to be an all-programmable company. When you look at our portfolio, it actually has expanded significantly. And we believe that over time, you'll find Xilinx-like devices in all of the programmable electronics systems. We actually, now, provide all-programmable technologies. And if you look at our devices, they're all programmable in numerous aspects, the software side, on the silicon side, in terms of the I/O, et cetera. It's really -- they are the ultimate in terms of stability and they provide tremendous value to our customers.

Now this is actually in order to respond to opportunities that we see as our customers are developing all-programmable and smarter systems, and the focus here is on the smarter systems. If you look at what's happening in the world, then you hear all the time about smarter networks, smarter data centers, smarter vision, smarter factories, smarter energy, and this is just a subset. And as we go through our presentation here, in particular Victor and Krishna, we'll talk about some of the systems we're in and how they take advantage of the capabilities of FPGA.

In order to do this, we're very pleased to have delivered what we fundamentally hear from our customers being technology, which is a generation ahead of anything they can find anywhere else. And it really is the industry's first all-programmable portfolio.

Now when you think back then, traditionally, Xilinx was a company that focused on things on the list, customers had some logic, they match it into an FPGA. When you look at what happened at 28-nanometer node, we've actually moved in a broad sense to a whole host of new applications. As a result, the customer is actually mapping the major portion of their system into the FPGA. The algorithms for logic, the software, the embedded microprocessor, advanced mixed signal, I/O and the protocols, they're all there, and they're mapped into the FPGA solution.

The FPGA solutions, in of themselves, have implemented in different ways. So there's the traditional FPGA, but there's now industry-leading portfolio of system-on-a-chip solutions with embedded ARM course, and there's our industry-leading 3D IC solution.

So the customers' differentiation in terms of hardware, all elements of it can be mapped into the FPGA, and we have a very broad fit of FPGA. The 28-nanometer we fundamentally and we hear this from a broad set of customers we've provided a set of solutions, which sets us apart from anyone else. You look at the portfolio, we have our scalable optimized FPGA solution, which span the entire product offering. In addition, we have the SoCs and 3D ICs, all of those are available today, talk a little more about the level of maturity and where they are.

In terms of the capabilities of the product, fundamentally, there's an extra node of performance, higher performance, lower power and a higher level of integration in our products, vis-à-vis, anything you can get at 28 nanometers from anyone else. And all of this is compounded by a totally new development environment called Vivado, which provides our customers both a faster time to this mapping and actually better quality of results. So we get a more effective system, and this improvement in terms of productivity is something we hear about in a broad way.

This has already resulted in the fastest growth in terms of revenue for a new product offering from Xilinx. And if you look at the numbers for this fiscal year, we expect to surpass $100 million in cumulative sales this quarter. This will position us extremely well, where for the entire year, our expectation is to out-ship anyone else by at least 50% in terms of revenue dollars at 28 nanometers.

So even though these numbers are still early, it's a huge gap, and it's a gap that we tend to capitalize on going forward. This sets the stage for the next generation of product, and our goal -- and we'll go into great detail as to how we're doing this, to stay a generation ahead 28 -- 20 nanometers. So what you will be seeing in the next generation of products, which will have the series 8 moniker to them is a portfolio of products, where we'll see a second generation of scalable, optimized FPGAs and second-generation of our SoC and 3D IC products.

These are being designed in a way where they are co-optimized with the underlying software suite and Vivado software suite and that provides even higher performance, higher power and higher integration vis-à-vis the 28-nanometer node and will provide us with leadership going forward. Again, will be done with that faster time-to-market and with a higher productivity.

Now all of this is being augmented and you've seen the press release. Krishna will talk about this, but the smarter solution for smarter networks, data centers and control. Because today it's not only about having the excellent FPGA technology and having the best implementation technology for Vivado, but it's actually having the smart solution, the IP that is required. And this is basically a key to enabling us to further broaden our penetration and replacement of ASICs and ASSPs.

So all of these elements are coming together. They're accelerating our growth, and basically, these are the capabilities that enable us to further the programmable imperative for displacement of ASICs and ASSPs. Now if you look at what's happening in the industry, you're seeing these megatrends, smarter data centers, a smarter wired networks, the smarter wireless heterogenous network and the video and smarter vision. All of these are being addressed through the programmable imperatives with FPGAs. FPGAs will have a larger and larger portion of the bill of materials.

In order to achieve this, and this sort of shows how these new technologies, which we have uniquely, at 28 nanometers in terms of being first in market and in some cases being several months and years ahead of the competition on the SoC and the 3D IC level, you can see how they enable us to broaden our market reach. So the Zynq product offering, which is our SoC solution, it enables us significantly to broaden our foothold in all 4 areas with Zynq-based solution. Krishna will go into more detail as to exactly what the benefits are.

And then on 3D IC, which is targeted typically at the very high end of the products offering, they enable us to penetrate the high end of wireless communications, which today is one of the few areas where there's still -- why there's still ASICs sort of being designed and there's still -- that it seems there's more opportunity for us to penetrate through 3D IC solution similarly at the high-end data centers, networking and storage application.

So all of this is coming together, and what we're seeing is that the these trends are actually merging. And we're seeing that the smarter vision, the smart networks are actually addressing all of these markets together, and to some extent, they're driving each other. So if you look at the driver, it's something which requires phenomenally high processing speeds inside automobiles. That is generating additional processing performance required, but it's all in addition, driving bandwidth requirements.

And as you look at each of these applications, they actually feed upon themselves. And if you look at the common theme, they all require insatiable smarter bandwidth, and that, in and of itself, continues to feed and generate a huge set of applications that benefit from FPGA.

So what we have done is we are investing very heavily in order to enable us to accelerate this trend and to display ASICs and ASSPs at a faster rate than we have before. And we cannot do this with your grandparents' FPGA. It actually requires a whole lot more than that.

So in addition to the most advanced technologies of 28, which will translate into the most advanced technology for 20-nanometer node, we will be -- we're providing a lot of additional things. The Vivado implementation suite is essential to doing this. It cannot the done using traditional FPGA design practices. It really requires transition to a more ASICs development flow.

Now the ASIC industry has always had the EDA-industry supported, but we have developed and Vivado is our largest engineer, monolithic engineering investment and they -- we have made enables us to provide the users with an ASIC-like experience to achieve ASIC-like performance, productivity, et cetera, and integrity in terms of design. In addition, we've invested heavily in the SmartCORE IP that enables us to attack more and more of the ASSP market going forward, and all of this gets implemented on the leading-edge FPGA system on chips solutions and our 3D IC.

So these smarter, all programmable solutions are the core of the capability, and it's all there in order to enable us to address larger markets. So fundamentally as we look at the size of the markets we can address, you've seen something similar to this, but there has some subtleness here.

We'll show you some of the data points, but initially to our surprise, it actually makes a lot of sense. We had thought that we would be in the business of displacing ASICs and eventually ASSPs. What is happening now is we're displacing ASSPs is actually at a faster rate than displacing ASIC.

So the market available to us is growing at a rapid rate, and this basically translates into a serviceable market in the 2016 timeframe of over $16 billion. And all of this has come together as we have basically driven and benefited from the industry mandate. Programmable imperatives, the fact that ASIC and ASSPs today are no longer viable at advanced node except for really high-volume consumer applications. The focus our customers have on billable material cost reduction, which basically is done through programmable systems integration and the overall umbrella requirement for insatiable smarter, more intelligent bandwidth. All of these are being addressed by Xilinx at 28-nanometer very successfully. We have leadership of fast node. We have leadership -- significant leadership in terms of chip revenue.

And basically, what we'd like to do is to share more insights into these areas. I'll now hand it over to Victor, who will go into more details on our technology portfolio A Generation Ahead and how we intend to stay a generation ahead. Thank you.

Victor Peng

Thanks, Moshe. About 2 years ago when we had the conference here in New York, I talked about how we're just getting our first 28-nanometer silicon. In fact, it was in March, 2 years ago. So I'm really happy to be here to talk about how we, not only achieved our objective of leadership at the 28-nanometer, but as Moshe alluded to, we believe we're a full generation ahead of the competition. And in fact, were poised quite well to extend that lead into 20 nanometers.

So this is the broadest portfolio we've ever had at Xilinx, right, 5 full product families at this node, 3 monolithic FPGAs. So the Artix, which is the cost focus, power focus architecture; the Kintex midrange, which leads the industry in terms of price performance per watt; and then the Virtex, which is the app with the highest performance FPGA. And we really have 2 subfamilies. That's why we say we have 5 families. Part of the Virtex family is the 3D IC technology that you heard Moshe talked about. And this is industry-leading in any industry, right? So we're the first company to produce 3D technology as real product, not as test vehicles or technology demos. And then the fifth is the Zynq product line, the all-programmable SoC. This is the integration of a dual core ARM subsystem, complete with its own memory, caches, [indiscernible] and so forth. So 5 complete product families.

Using the -- this expandable -- excuse me, this scalable and optimized architecture, we really leverage this architecture across all 3 and yet optimize for each of those different performance power and cost points. And we did that through innovation and architecture through design innovation, as well as process our 3D technology I talked about.

So I'll go through examples of this so you could see in real applications the tremendous value that we give our customers through this product line. One of them across the board that we have leadership in is SerDes serial transceivers. So many of you may know, again Moshe alluded to, the fact that [indiscernible] is really the need in all kinds of systems, whether it's communications, in data center, in video machine visions and so forth. So serial transceiver is really important where the acknowledged industry leader, I say, not only the FPGA industry, but really one of the best in the world in terms of the total balance that we have per device in terms of the signal integrity, driving back [indiscernible] as well as chip and chip interfaces.

And then Moshe talked again about the productivity. And the nice thing about the productivity in the Vivado Design Suite is that, that really leverages across the entire portfolio. In other words, this helps our customers no matter which product they select to get to market quicker and with better results.

So starting with the FPGA family. Again if you look at Virtex it's got 2x of bandwidth. 2x, though, is the largest capacity of our competitor's largest device. And again, this is enabled through the 3D technology. So we have 2 million logic sales compared to their 1. We have significantly more SerDes balance and at lower power.

In the mid-range in Kintex, we see anywhere from 45% faster logic performance, as well as 35% lower power. And we have twice the number of DSP resources. Artix solely, again, optimized for lower system cost and power, but also has integrated analog/mixed-signals, which again reduces the system [indiscernible] costs. So very, very broad product offering in the core FPGA area.

But again we were the first, I mentioned this earlier, the first in the industry to introduce the 3D IC, we sampled this back in the fall of 2011. And now we're in full production. So this has been out there for quite some time. We actually have 2 flavors of this, one which is what we call homogeneous integration, meaning that the multiple 28-nanometer die that we integrate on a silicon interposer. That's -- the die are all the same, that's what the 2000T is. We also have a subfamily, the HT family, that integrates 28 gig transceivers. In that case we integrate 2 separate dies, one for the transceivers and then of course, the FPGA. We offer a 4x more 28 gig transceivers than the competitor. So right now as I said, this technology is actually in production, the 2000T. We expect volume ramping production in the heterogeneous device later this year as well.

So now I'll take you through how we're getting traction in the marketplace. This is where, of course, the rubber meets the road. So Kintex is the first family that we introduced. So as you might imagine today, we're shipping to the most unique customers. These are unique customers over 550 in all the segments we serve. So it's communications including the data center ISM, aerospace and defense, broadcast, consumer and automotive.

Virtex is the next product we introduced. It has over 200 customers. By revenue in the long term we definitely see that as being still the leader in total revenue. We've seen very strong growth there.

Artix is the last family we introduced. There's only 2 product families there, but we already see very good pick-up. The focus there has been in some other areas. We see very strong growth also in the communications and data center market.

So now I'm going to walk you through some of these examples and you can see why we're getting such strong traction in the marketplace and why we can claim that we're a full generation ahead. So we focus, laser focus on 5 areas of value. The programmable systems integration, because oftentimes, that can help realize a number of these other things, which is higher system performance, right, lower system bomb costs, lower system power. And then finally, of course, accelerating productivity, you're getting to market more rapidly.

You hear me repeating system over and over again because that's what the customers really care about right? It's not about at the component level of the Ts & Cs, and certain attributes. But they really care about is what they get when they integrate this and they build the system.

So what you see here is a video surveillance camera example, and in this marketplace, the image quality is a key differentiator. So they really need to add their own IP in a proprietary algorithm. Now for indentation perspective, some of them might want to try and build a custom solution, but as Moshe said, that's really prohibitively expensive to do an ASIC.

So now the alternative is to use an ASSP. The problem with that is that really limits the amount of differentiation they can have. So with the Artix solution, right, they can implement their own proprietary IP all of that one chip solution, they get a very significant performance improvement. They lower the BOM cost compared to the ASSP and they also can reduce the power. We -- in addition to providing the Artix, as Moshe alluded to, we really also provide SmartCORE IP. And we provide that directly, and we also work with third-party partners that you can see in the demo back there. In fact, we have a third party that has the reference pipe for a video processor.

So this is Kintex. So this is an avionics cockpit display platform. Now in this industry, FPGA's already acknowledged as a really good way to go in terms of estimating the platform. So in this case we're looking at how 28-nanometer is displacing current other FPGAs. This is a situation where, again, system integration, the capability of the 28-nanometer allows people to reduce a 3-chip solution into a single-chip solution. At the same time, because of those really high-speed transceivers I talked about, they could actually use much higher resolution image sensors, which, of course, gives a much more compelling cockpit display.

So once again higher system performance, BOM cost, in this case, about the same, but lower power. And the other thing you note is that our solution -- both the FPGA, the IP, the Total Solution is DO-254 compliant. That's a very important certification to get and it's all about everything in terms of the methodology and how you develop the quality and the verification of the solution. So all these things help our customers get to market very quickly.

Moving on to Virtex. This is one example of the Virtex 3D IC. And this is where having a 2x density advantage really, really shines, because again you can have the number of devices, but you also significantly simplify the overall board. In fact, the board form factor got reduced. These are line cards that go into a stepper that's using semiconductor manufacturing. They increase their performance, significantly lower the BOM cost, again, with a much simpler board design. Your part, they lower the power. And the board design being simpler, that actually translated to them having a shorter development cycle. So again, in this case, it's really no competition, 2x density factor just wins the day.

So one more example on Virtex. This is the heterogeneous Virtex that I mentioned, also 3D IC. 16 28-gig SerDes transceivers. So this is a 4 x 100 gig optical transport application, meaning to interface for the next generation CFT2 optical standard. So it's really key having this 28-gig SerDes to communicate to that optical technology reducing -- increasing the bandwidth per port, putting in the port back for lowering the power. In this case, system performance and BOM cost is about the same as the old generation. But of course, you get the significant upgrade because you're going through the next-generation optical. You lower your power, is again, a significant halving of the number of parts. And Vivado, as I'll talk about later, is being used for these 3D, very -- the most complicated kind of design that we have.

So Zynq, again, the industry's first integration of an ARM SoC together with FPGA. This really gives the customers the capability to have both software programmability, as well as the hardware programmability, and this can really differentiate. And like our FPGA, we believe that we're significantly ahead of the competition.

So first in terms of time to market, we are now in production. We had sample sent well over a year ago. But even beyond that, like the ARM core that we have, the highest frequency is a gigahertz compared to our competition which tops out at 800 megahertz. We have 4x [indiscernible] on-chip memory as the process subsystem, which really does affect that system-level performance. And then, of course, it still benefits from the advantages of the fabric, because we're leveraging our Kintex and our Artix fabric.

So this is clearly an area where we displaced ASSPs, ASICs, and so this is an area which will grow the service to market. You'll see that when I go through some examples. So we currently have shipped over 20,000 devices. We have a very broad ecosystem. We have over 100 third parties creating value around this platform.

So here we are by segment. You see once again we serve all the markets as we do broadly. You see a lot of strength in industrial and automotive. That's really a reflection of the fact that some of our White House customers live within that area. We have really good growth in communications. We actually expect that to grow further. But again, just in terms of where we should start, but you see over 350 customers, unique customers. In terms of overall lifetime revenues, expect us be on par with the Kintex family, which is a really, really strong family.

So I give you a couple of examples where Zynq is winning. I mentioned this is one of the early applications. So driver assistance platform, as you can -- also you'll see some more these kinds of applications in the demo. But this is a situation where FPGAs were present, but it wasn't doing the lion's share of the processing.

So if you look in the upper left here, FPGAs was traditionally doing the pixel processing. Then you have the DSP doing, what's called the element processing and the stream findings, identifying different objects and things. And then you have a microcontroller doing sort of things at the frame level, also doing various control functions. So you had multichip solutions.

Zynq enables you to get that all classed to a single die. Because you have the ARM SoC dual core, that could be running as a software -- the application software, while it's also doing the communications control processing that the processors had done. We have enough -- we have, in fact, more DSPK in many of the shelf DSP processors. And our customers can still add their own proprietary IP in this.

So once again, 30% higher system performance, lower BOM cost, significantly lower power. And then, I mentioned this already, we provide a whole video pipeline in our SmartCORE offering. We also have third parties that work with it that have really amazing technology. We ship this all on a kit right out of the box that's really helps our customers get up and going very quickly with this technology.

Another application. So I guess, one thing I should mention here is that clearly we displaced -- in ASSP, we also displaced lots of shelf processors, in this case. In this case, this is another application where a customer was looking at doing a secure data center application, where they had their own accelerator for that security function. They're considering implementing that in ASICs. Once again, if they really do the economics, that really makes no sense at all, focus in significant time-to-market disadvantage have to go through an ASIC development cycle.

The FPGA was already there. As Moshe said, traditionally, we've been there for a lot of the connectivity and some of the other miscellaneous logics. But once again, Zynq can really take care of all those functions in a single chip, get them to market very quickly. They could still do this in a very secure, proprietary way. So 2 chips goes to 1, 50% more power performance in the system, lower BOM cost, lower power. And once again, this is on ARM SoC. They could really leverage doing extremely broad ARM ecosystem. We also provide a number of development tools right out of the box both for hardware development side, as well as the software development side. So this is another area we see expansion in the marketplaces and applications that we can serve.

So I'm going to talk a little bit more about Vivado because -- and again, the silicon is what you tend to focus on because that's what we ship and generate our revenue. But Moshe talked about this a lot because it's really important that this can be leveraged across the entire product line, and we lived with this for more than a decade, right?

So we implement this over 4 -- we developed this for over 4 years. We've invested hundreds of man years of investment. And the results that we get with this are better than what we get with our current tools on the exact same silicon platform. So what that means is if we looked at our old generation tool using the exact same, say, Kintex device, you would get better results with Vivado.

So what we're seeing today in terms of uptick is about half of all new designs at 28 nanometer are being done with Vivado even though we've had this out in production for less than a year. 100% of designs in the 3D IC, so the largest, most complex systems are being designed with this. And increases productivity in this metric. This is looking at a process called Place and Route, 4x of productivity. But we also have what's called High-Level Synthesis, right, so Vivado HLS. That enables customers to develop their design using C, C++ or SystemC. They don't have to work at the lower level called RTL, and they could implement their design, turning designs around in actually seconds, right? So there's going to be a demo in the back later that will implement a very interesting design, all being done at the C level, no RTL whatsoever.

So again this is a huge lever on productivity. And really, quite frankly, what this is going to do over time is expand type of users we could reach because, again, customers can really focus at the system and algorithm level and don't have to work so much of the low-level logic.

Okay. So now I'm going to go and talk about where we're heading in the future. You picked up on this trend. We have 3 major vectors, if you will. One is our core FPGA, right? So we have 3 significant families. We introduced the industry's first integrated ARM SoC together with FPGAs, and we've implemented the industry's first 3D IC technology.

So what we're going to do at 20 nanometers is we're going to build all 3 of those vectors. Systems integration, as you can see, has been driving a lot of improvement -- in fact, driving the semiconductor team for all these years, and we're going to continue to integrate more on each of these platforms in that, to mention. And at the same time, we will continue to keep improving the cost per performance for whatever metric -- DSP performance, image or processing performance, or whatever, as well as the power efficiency. And you can see, for instance, on the 3D IC we've already implemented high-speed transceivers together with FPGAs. You could look for us integrating things like memory, memory is becoming more of a bottleneck. And you'll see us, at some point in time, actually integrating the whole SoCs together in this 3D fashion.

On the Zynq side, we already have a dual-core multiprocessor system. We could see us taking that to even higher levels of larger numbers of core. We certainly did the heterogeneous cores, it won't really be a multi -- or a many-core implementation. And you'll see us continuously improving the software environment, and again, continuing to enable people to redesign at a higher level of the algorithm of the architecture of the system.

And then lastly, on the FPGAs, we've already integrated is analog/mixed-signal. You'll see us moving up that design abstractions. So instead of focusing on IT core, you'll see us do whole IT subsystems.

So to give you an idea about -- the 20-nanometer node was our -- the 8 series, if you will. Yes, Moshe talked again about the need for smarter network, smarter vision. So all of these things demand higher bandwidth, as well as higher performance.

So on the wired infrastructure side, I mentioned SerDes is key. So currently the high-end SerDes runs at 13.1 gig. We see taking that to 33 gig. We're going to increase the capacity by another 50%. Again, this is the -- usually the highest performance in the many applications we tackle.

On the wireless networks side, they need a lot of performance generally in the DSP side. So we're going to be doubling the DSP processing capability we have. And also very power sensitive, so putting heavy-duty processing and remote radio, you have to really care about core factor and power. So we're going to continue to look at ways to -- if you have the same performance, probably, you had current duration, either having the power, or if you have the same power budget, you could double the performance.

And then on smarter networks, again, of course, you imagine that needs more processing capability. This is not DSP processing, it's more traditional processing, either the fabric or in the process subsystem. So we'll increase that by 50%.

We increase the memory bandwidth by 4x. Because again, as I mentioned, memory bandwidths is also the true limit of a system's performance. And then in the smart vision and video area, they could already leverage this higher DSP performance I alluded to. They will also leverage the higher SoC performance I alluded to. And we'll look at other things in terms of analytics, other functions that are common in many applications we serve to see whether we might harness and integrate those as well.

So where we are today with this. Again, it's nice, it's been about 2 years since I was here showing you the -- or announcing that we got our first 28-nanometer silicon. We just recently announced that we are already working with our Early Access customers on 20-nanometers later this month. Our customers will see device models for those 20-nanometer devices, and we announced that we will be doing our first product tape out next quarter.

So I'll just leave you with very, very strong lead in 28, a full generation ahead. You saw example after example where we had the better performance integration level of power. We are poised to continue this. We believe we're probably going to be also first or among the very first to tape out 20 nanometers.

And with that, I thank you. And I'll turn it over to Krishna to talk about megatrends and the communications market.

Krishna Rangasayee

Thank you, Victor. Good afternoon, everybody. Xilinx's growth strategy is based on 2 key elements. One is to capitalize on the megatrends that Moshe talked about, and the second thing is to really focus on displacing ASIC and ASSPs towards growth. Over the course of my presentation today, I'll walk you through the details of the strategy and also the progress we've made as a company towards that end.

This is something all of you keenly are aware of. I'm not telling you anything new that you already don't know. But we are getting out of a phase of capital -- CapEx spend was really very anemic for the past 4 to 4.5 years. That's been true for both wireless and for wired communications.

And from all leading indicators from visiting customers, talking to carriers, IT spend, we really see that we are beginning to enter a new growth cycle the next 4 to 5 years. So this is the envelope around which, I think, we are beginning to look at customer correction, customer momentum and also market trends systematic to the CapEx cycle.

What's more interesting is not just the past level view of the CapEx. There's very many underlying things that we are closely tracking in terms of where are the usual pockets of growth within the CapEx expenditure across service provider, IT and government spend. And the, obviously, most tracked and the most visible one is really around LTE on wireless. And that is obviously sitting on an extremely high CAGR, as customers really look at smart heterogenous networks and that deployment. U.S. is, obviously, leading the pack today, followed by Japan and Korea, but we clearly see the trend for LTE being picked up both in FD and TD-LTE across the world over the course of the second half of this year and also, obviously, going into next year.

For the first time, I'll talk of the wireless trend and the wireless CapEx growth. We are beginning to see firming up and actually very decent projections on growth for the wired communications on the data center market. This hasn't been true for many, many years. And so probably in the past 8 to 10 years, for the first time across almost every major wired communications segment, we are seeing strengthening of the CapEx outlook, and it's across true -- true across optical networks, data center enterprise switching and service-provider switching.

And what you have on the right-hand column here is the growth driver that is one of the leading indicators as to -- or one of the leading contributors to why there's a bullish CapEx outlook. This is the most positive equipment consumption forecast that we have seen in quite a few years. It's true for wireless and true also for wired communications.

So Moshe talked about the industry megatrends and this is our key factor-related capital on the megatrends. Across smarter data centers and by 100-gig wired network communication systems, smarter wireless heterogenous networks and also on the video and the smarter vision. What we did over the past few years was really to track these 4 megatrends, match them very closely with our customers and we spent a lot of energy in ensuring that the portfolio that we built-up from an FPGA, from an SoC and a 3D IC perspective, map really into the growth drivers that enable growth for us as a company.

So the FPGA perspective for wired communications. They are moved beyond the glue logic element into areas where we believe it's high value for the system, but also areas where we can persistently add significant value for our position to displace ASIC and ASSP. In the areas of traffic management, packet processing, framer/mapper, SAR, these are applications that we have peripheral participation before, now we have -- today, it's becoming one of the mainstream supplier solutions to this market.

In the wireless market, digital front-end, FEC, MIMO, L1/L2 acquisition [ph] baseband, and the smart data center, which is relatively a nascent market or new market for Xilinx. We're becoming one of the leading suppliers for solutions to SoC storage controller, application acceleration, 80-gig NIC cards. So these are areas where I think -- again, traditionally, these are all serviced by ASIC and ASSPs, and we have macro portfolio from a silicon software and IP perspective to become one of the leading suppliers for solutions to market.

The video and the smarter vision portion of it spans multiple end markets, industrial and medical, consumer, automotive, aerospace and defense. There are 28 different individual applications that we are very keenly focused on essentially to become lead suppliers of solutions to market.

Beyond optimizing our FPGA, the traditional FPGA portfolio, we added in 2 new vectors, as Victor walked you through. One of them is the SoC, the Zynq product line, and with the 3D IC, with the capabilities that have been used in high-end with the Virtex product line. These have opened up new opportunities that we normally would not be participating in as a company. And today we are driving solutions to carry Internet-wired backhaul with the Zynq product line. Quickly following Kintex, because Zynq is getting a lot of market traction in the remote radio and the backhaul modem, or -- and also in small [indiscernible], the wireless market, security appliances and WAN acceleration for data centers, and a host of video and smarter vision applications that all leverage the fact that we have a programmable fabric very tightly interlocked in -- within ARM programmable's process subsystems. Very new applications and these are all applications traditionally FPGAs have not participated in so far, and this brings to us a growth envelope, which we normally would not have participated in.

On 3D IC, we are pioneering across the entire semiconductor landscape not just in the field industry in providing this capability. And this initiative was something that we started in the labs in Victor's organization about 5 to 7 years ago. And today, they are leading the market in providing 3D IC solutions. And it's opening up in wired communications an opportunity to be probably the sole provider of solutions for 200-gig and 400-gig optical transport. They are offering 2x of density and 2x of bandwidth of any other solution that's out there in the market. And obviously, driving the benefit of that investment in the portfolio.

Similarly in the data center, we are participating on top of the rack switches and also leading solutions and providing applications that are focused on I/O Virtualization. So this mapping of the broader portfolio against the industry megatrend is really the backdrop from which we're engineering growth. And again, the focus for us is to compete and displace ASIC and ASSPs.

So I want to spend a few minutes on where we see the competitive outlook on the ASICs and ASSPs. And this chart to the left here bears a little explanation. It's well known and well documented the increased product development cost as we go into advanced process nodes, and it's becoming harder and harder to justify ASICs. This chart comes from a company called IBS that tracks this market quite closely. The way to read this chart is really around what is the expected return for a profitable venture in investing any of these process technologies. The blue line here tags if you run a 5x switch on the investment; the green line, 7.5x; and the red line here is tagged as 10x switch on -- for every dollar returned, what's the return that you want to have on your revenue. So to be in a reasonably profitable range, you need a 5x to 10x return. And if you look at the 28-nanometer node, for approximately an $80-million spend, you need to be around $400 million to $800 million to justify 28-nanometer ASIC.

Wired communications and wireless communications are still fairly mid-range in volume, and they really do not run into very high volumes by consumers. But the level of complexity is very high, and add all of this up, the number of ASIC design starts is precipitously dropping, has been dropping for a while but particularly at 28-nanometer, we see a marked change in the market with regards to customer behavior on selection of ASIC versus ASSP versus programmable logic.

So at the top 10 OEMs or the top 10 of our customers in communications where we have the highest visibility, we see less than 50 ASIC starts today across all of them. And particularly, if you focus in on 28-nanometer, less than 20 ASIC starts. And it all goes back 5 years ago, it used to be at 200 and 300. So we see very few ASIC starts continuing to really happen, particularly at the advanced nodes. So level of complexity and the need for high touch technology has not gone, but the economics are forcing customers to really look at other options. And we continue to really focus on providing all programmable solutions to address this market opportunity.

The similar cost basis plays into the ASSP market. The chart here really tracks the top 16 communications ASSP vendors, and the majority of them have been losing money for multiple years. So back in 1999, you had more than 90 communications ASSP companies. Today it's less than 20, and it's our projection that this market is going to shrink and the number of viable suppliers are going to be quite few. And again customers are hurt on multiple elements. One is around many of these big customers are losing confidence in really having these vendors really have a thriving broadband. There's also a significant cost burden from these ASSP companies having to combine multiple applications and build one chip because they can only afford to build a few of them going forward. So the cost burden that should be borne by a particular application is now becoming quite difficult for our customers to manage, whereas some of the applications use less than 20% to 30% the capabilities of what the ASSPs offer, because they're overdesigned to meet multiple applications. So from a cost efficiency, and also complicates the ability for the ASSP companies not to allow our customers to differentiate, it really is forcing our customers to really look at other options. And this is again an opportunity that I think we are ready to take.

So from an economic cost basis ASICs are becoming very hard to deal with. And again a similar phenomenon with the ASSP side that's complicated again with other line mix as well. I think customers are looking for differentiation. This opens up a very significant growth opportunity for Xilinx.

So actually we've announced that we are going to be delivering solutions -- that we actually have been delivering solutions for the past 2 years to take advantage of the ASIC and ASSP gaps that we have talked about. But you continue to see that we are not only building upon the strong technology basis and the leadership we have at 28-nanometer, we are extending that leadership by adding SmartCORE IP capability, but that's 2 things: One is, it allows us to clearly differentiate and delineate ourselves from our immediate PLD competitor. The second thing it allows us to do is really accelerate our ability to address ASIC and ASSP opportunities. So it's not just a technology and a process technology node differentiation. You need to have the IP to run in the market, and we are beginning to really set a road map and executing to a road map where want to provide industry-leading IP along with the strong technology basis that we have.

Listening to all of our customers, there's been a lot of messaging in the press with regards to software-defined networks, social market networks. At the highest levels of abstraction, 2 key things that are happening: One is, customers are pushing [indiscernible]. The second thing is they're pushing the ability to monetize the existing investments very high. So this translates to them wanting to have network and context-aware solutions, bandwidth and cost-efficient solutions, solutions that are adaptable and reusable, highly differentiated, faster time-to-market. This literally is a value proposition that Xilinx offers better than any of the other suppliers in the market.

So the CapEx envelope, combined with a really competitive outlook, with a strong customer demand and the opportunity to really becoming more [indiscernible] designs this core value proposition has really opened up a very tremendous set of opportunities for us as a company to really capitalize on and help our customers provide solutions to the opportunity market.

What we've done, again, building upon the technology basis, is over the past 2, 2.5 years, we have gone through a phase of acquiring companies that have very, very strong systems expertise in IP. We've been able to attune their internal capabilities to a need to provide IT solutions that will lead the market today, that are compelling for our Tier 1 customers, and combine that with our technology basis, create a value proposition that's unmatched in the industry.

There's a variety of different applications that we are pushing solutions for today, and we are combining that under the moniker of SmartCORE that Victor talked about. And again, the key focus for us in this regard with smarter networks and data centers is to do what it takes to accelerate the displacement of ASICs and ASSPs.

We have taken a similar approach to the video on the smarter vision, and as Moshe articulated to you, we see the 2 trends of the growth in the network and the data center combined hand-in-hand with the video and the smarter vision, a similar view of, say co-partner ecosystem or acquisitions in our internal investment. And we are tuning our road map so we, again, provide IP that's industry-leading and again with a simple focus on ensuring that we accelerate the ability to displace the existing ASSP.

With regards to wired communications, there's many, many sub trends that are happening in the market. The biggest trend that's really happening is 100 gig systems are finally beginning to go to production. And we see that over the next 3 to 5 years, 100 gig networks will really take over and become the fastest adoptive trend ever in the industry in a long time to come -- in a very long time.

The wired communications band for Xilinx is around $4.4 billion. The CAGR is around 11%. And if I were to pick one particular sub applications, I would see a very interesting change. About 4 to 5 years ago, the 10 gig and the 40 gig market for OTN, our optical transport, was heavily dominated by ASSP vendors. There are 7 vendors that drove 94% of all the business, and today we see 3 vendors that have a very weak road map that are not able to sustain the road map for the use of customers. So at 100 gig and beyond, 200 gig and 400 gig, what used to be an all ASSP play is essentially becoming an All-Programmable logic or All-Programmable space. It's an enormous market opportunity for us. And if you add up the logic IC BOM consumed by our customer, the first ASIC, ASSP, DSPs processors, in that combined outlook, we represent around 12% of the spend today in the top-end customers. We see that increase very significantly to be 32% of the overall pie by the 2016 time frame.

And again, it's a combination of our technology basis primarily, Virtex-based solutions, but combined with our SmartCORE IP, and we do expect that by 2016, we'll be the #1 supplier of optical transport solutions to market. That's a very, very big shift for Xilinx where we move from a glue logic environment to becoming the #1 supplier in the OTN marketplace based on the design wins and the market traction we have had to date. We've had great success in OTN and we are quite bullish on the prospect of [indiscernible] in the long term. And we plan to be #1 in this market.

On the wireless network, I mean, again, it's very, very key market for us and continued demand. LTE, both Fc and TD, is really going to kick in, in a very big way. U.S. has spent the CapEx and is also coming to spend a lot more CapEx over the next year, year and a half. But we are now seeing all the geographies really moving to a CapEx spend in around for LTE. The SAM is around 2.4 of a CAGR of 9%, a very healthy CAGR.

Kintex has really become the de facto radio solution in the market today. Zynq is getting a lot of traction, and we believe that over a period of time, Zynq will also get as much traction as Kintex in the market today. We have won around 80% of all the radio platforms also at 28-nanometer, which is a very, very big number for us as a company.

And again, from a radiologic ST BOM, we are one of the leaders in the market today at 30%. By 2016, we expect that to be at 50%, and we also plan and project that we'll be the #1 supplier of radio solutions to market for the wireless infrastructure market, and increasingly for small cell market.

Data centers is relatively a new area of growth and focus for us as a company. Very small percentage of participation today in the data center appliance portion, so only 5%. We project it to go 8%, both a small number in percentages, but this is a fast growing market for us. And we have a strong outlook for where we're going to be in data centers going forward. The big differentiator for us and the area of focus for us is not just in the silicon technology alone, but ensuring that we have the right SmartCORE capability so we can accelerate the solutions that we can provide to our data center customers. And this is a new SAM for us that we are beginning to focus on, just an incremental $2.2 billion with a very high CAGR, and we have very strong outlook for where we're going to be in data center market going forward.

Video and SmartCORE vision. Both Moshe and Victor talked about this in quite some detail. So this is spanning across, as I told you, multiple end markets: automotive, consumer, industrial, medical, aerospace and defense. And we see very many applications that really pervasively adopt our technology for this particular market.

The SAM is around $2.1 billion with very high CAGR of around 16%. And what we have aligned is really our customer -- our internal solution and our partner solution to match up with customer needs around the lines of all these different various SmartCORE applications. And we we're seeing very strong traction of Artix and Zynq. And the combination of the Artix and Zynq portfolio, the SmartCORE is opening up these very, very many opportunities for us as a company. I'm quite excited about our opportunity in this landscape.

Driver assistance is a key application focus for us in the automotive market, and we expect our logic IC BOM share to move from 18% to 26% over the 2016 time frame.

Mapping the market sectors we are driving over the major accounts. The way to read this chart is each one of the bars here represent the lifetime expected revenue that we plan to make on each one of the key design wins we have with our key customers. And the color code here is around -- the red represents the displaced in SPG [ph] before or this displaced an ASIC or ASSP that a customer has designed. So in this particular customer A, about 80% of all the opportunities that we won there came at displacing an ASIC and an ASSP. And the numbers vary by each OEM, but the contract is -- this is an extremely different experience for us as a company compared to where we were previously. The contract at 40-nanometer, our level of displacement of ASIC and ASSPs was less than 10%. So we have gone from displacing less than 10% of our ASIC and ASSPs as part of the overall design win momentum to a very large number of 40%. And this is across our top 10 customers. And if we expand this to all of Xylinx's end markets and all the market traction we have today, about 25% of all the total wins we have across a broad set of applications represents the entire broad portfolio. So this is Artix, Kintex, Virtex, Zynq combine that with our SmartCORE capability and this is a sample of, if you will, the various ASICs and ASSPs that we have displaced. A key component of our growth is really that we continue to really increase our foray into displacing ASICs and ASSPs.

In the wired communications market, to map out the journey of where we were to where we are headed as a company, the color in maroon is really traditionally where Xilinx is at in wired communications applications. We were bridging entity and getting the few other niche applications. Not to say that we'll not have participation in a few other areas but those are nascent and are on a prototyping basis.

A combination of the 7 series silicon software capability along with the SmartCORE capability is allowing us to really get into the dark blue area, where we're getting into a very hard on focus and we are becoming one of the leading supplier solutions for the wired communications market. We are into packet processing, traffic management, forward functions. And today, across all of our top 10 customers, we have seen very strong traction where we are displacing ASIC and ASSPs and becoming the heart of the system in wired communications.

A similar transition in wireless communications. We were in a fundamentally a glue logic embodiment, and we have moved into becoming the de facto radio solution and becoming the core processor and accelerator of everyone else who -- accelerator for baseband and also becoming a leading provider of solutions for the backhaul market. So the underlying shift for us is really to combine and make sure that we have the right portfolio map under the right megatrend, combine that with the right SmartCORE IP, and that is allowing us to really becoming one of the leading suppliers for any and all of these key markets.

Data center, a brand-new area of focus for us. I mean, our revenue basis is quite low today, but we have a very strong outlook for growth in this market. We had very little footprint in data centers before and there's an attraction of a network interface card. We are providing customers with solutions for packet processing and traffic management and also fundamentally 40 gig max capability, along with the process that we have, new opportunities, new growth areas displacing ASIC and ASSPs.

With video and vision that Victor talked about, this is a driver assistance system where we traditionally fit in [indiscernible] processing but now with the Zynq processor subsystem and the Zynq capability, we're now able to extend ourselves into, not only doing analytics, but also to collect [indiscernible] in communications capability along with the image processing. Big shift for us as a company again in this market as well.

In summary, I mean, our growth is predicated on 2 key elements. One is capitalizing on the megatrends and displace ASIC and ASSPs. And we are quite excited about what's behind us at 28-nanometer and eagerly looking forward to continuing the momentum, not only at 28, but also setting our sights in 20-nanometer. And the longer-term outlook for us to becoming a leading supplier solutions to communications market. And that's the journey that's ahead of us.

With that, I'll transition over to Jon, who's going to talk you through the growth with investment leverage.

Jon A. Olson

Thank you, Krishna. Everybody still with us? Are you here? Okay. My objective today's to go over a variety of topics that lend the financial support to what's been talked about today so far. So you heard Moshe, Krishna and Victor talk about our strategy, talk about our broad portfolio and the product attributes that move us a generation ahead. And we've gone through some specific applications where we think we've differentiated ourselves from traditional sockets that we've won before.

I'm going to talk a little bit today about the growth drivers, what we expect for growth over the next few years, what are some of the drivers behind that by end market. I'll talk to you a little bit about our business efficiency, what we're doing relative to being -- running a more efficient company, move into description of our forward-looking guidance for next quarter, and then end up with our capital allocation conversation.

So before I begin that, I want to kind of give a little bit of a capstone for the -- from the environment from the last years. Things really didn't turn out the way they thought they were going to. Quite frankly, there was a relatively anemic capital spending environment, both from a wired perspective and also a wireless deployment of LTE not moving along quite as quickly as we had quite anticipated. I think Krishna had spoken a little bit about that, as well as about our confidence for how we think that's moving to a much more positive situation going into this next year. Also we came out of a -- we had another, I'd say, challenging industrial cycle. We just come out of a adjustment period the year before, and so now this year we went into another cycle. So things in the back half of the year really didn't turn out the way we had anticipated. But despite those elements, we did gain market share in the field. The industry, a 3% gain in the last 12-month period. We've done a really nice job of getting new product growth going despite the anemic spending situation. So both our 40-, 45-nanometer products have grown nicely, but more specifically around the 28-nanometer where we really have some of these breakaway attributes. We've started out very, very strongly, and I'll talk a little bit more about that later.

And then we created this very broad portfolio that's really starting to penetrate the SAM in a much bigger way. Moshe showed you this slide earlier around the size of our SAM growing from a year-to-year basis, a $16 billion SAM. But I think the most interesting part of this is, we showed you these water towers in the past. We really are making significant progress in the ASIC, ASSP middle section and then with our SoC products in the All-Programmable section. We have proof point after proof point of how well and how deeply we are penetrating designs that we hadn't before -- we had not been done so before. And we really do expect a significant amount of growth in the company.

So what I'd like to do is take you through a few of the major end markets and talk about some of the sub- and sub-sub-end markets that are driving and what are driving the growth, and what we expect revenue to be in the coming years. So let me kind of set up with these slides you're going to mean. Left-hand stack is the stack of sub-end markets in the wired and data center area that we participate in. And the dollar figure underneath that is our approximate quarterly run rate in this current fiscal year that we're just finishing up. So in FY '13, our wired and data center communications revenue has been $130 million, $140 million.

What we expect is on the -- in the next 3 years is in the right-hand stack. So we expect growth in all categories quite significantly, but we would anticipate in 3 years to be at the $190-million to $200-million range. So that's a 12% to 14% CAGR.

Now in the past we've talked to you about 5-year CAGRs, and we really feel so strongly about how well we're doing and how large the number of design wins and sockets that we won across the very broad spectrum is going to lead to real growth in our company. And so we are -- expectations is for our company in this particular segment to grow 12% to 14% in a 3-year period.

Now some of the key drivers, we talked about some of those already here today, but some of the big issues are really around the exploding bandwidth requirements and our participation in the connectivity portion of that. So what's really important here is the thing that Krishna talked about and Victor had talked about around the 100 gig and 200 gig and 400 gig and the OTN protocol, and how well we're doing in those areas, with real design wins that we won, that we believe will result in revenue.

And then there's the smarter networks part of things using Zynq. Anything where there's packet processing and transfer of packets from point A to point B, to the cloud, anywhere most data centers, the inspection required of those packets, Zynq is winning designs -- is an ideal solution for that kind of capability. So we feel very confident in our growth in this particular segment.

Now talking about wireless for a second. Wireless is clearly dependent on how the LTE deployments are -- roll out over time. But we've been very positive about what we've heard to the North America, as well as the China rollout prospects. So that's a very positive tailwind we believe moving in and growing throughout the year.

Kintex is the leading product member here, that is ideally suited and specifically designed for wireless base station technology. So this is clearly a very strong participant. Krishna talked about the 80% design win rate in the wireless base station radio card perspective. And we also think backhaul is going to grow quite significantly for us, our footprint in backhaul in particular. We acquired a backhaul modem company last year. So we do believe that, that IP along with our FPGAs will create a bigger dollar footprint in mobile backhaul for us in the coming... Run rate will be in the neighborhood of going from about $115 million per quarter this year, which was below our expectations for the wireless market, growing to the $150 million to $160 million level in 3 years.

Now moving to some of our markets that are outside applications market, specifically automotive. We talked to you a little a bit about the driver assistance application. You can see here that's the big mover here for automotive. We do believe infotainment will continue to grow. The driver assistance is a big deal. And again, we're very confident about this kind of growth level as well because we've already won these designs. And as all of you know, the gestation period for when you first win -- when you win the design and when it starts showing up in the -- in automobiles is a fairly long time. And again we won those sockets and we do believe we're going to get this kind of growth.

There's one other thing that I want to point out, is that we've really expanded our geographic footprint in the automotive industry. So we are selling to -- in essentially all geographies, and that's really a departure from maybe where we were a few years ago. So we penetrated a much broader set of automobile sub suppliers on a global basis, which also is helping to fuel this growth.

The last area I want to go into some detail is ISM, so Industrial, Scientific and Medical. There, it's around vision, networking and control, so a very broad set of applications. We have a very broad penetration of our portfolio there. So this is an Artix, Kintex and Zynq play. A lot of this growth is in the area of factory automation, which is an industrial networking category. Also we've been penetrating with Zynq in particular in control points and alternate energy. So this is a subsegment that is emerging for us, and we won a significant number of designs in this area. And that will continue to grow as we go through the next few years. And again, this segment, we believe, grows from around the $70-million-per-quarter run rate to the $95-million to $100-million level.

And when you step back and look at the entirety of our end market scenario, you can see here by these green arrows, we do expect communications to be up rather significantly. I just talked about that, also industrial and broadcast, consumer automotive, also up.

We didn't mention a couple of the -- I didn't go into detail on a couple of the other end markets, specifically broadcast and aerospace and defense. We do believe that both of those will grow high-single digits to double -- low-double-digits growth rate. We just chose not to talk about that in any great detail. So we have a very strong backing and belief around the growth rates of some of these key end markets, that should deliver an 8% to 12% CAGR over the next 3 years.

So another thing that really bolsters our confidence that what we're saying is really going to happen, is really how rapidly the 28-nanometer revenue has grown for us, or has started off for us. As all of you know, we talk a lot about socket wins in all these situations. In the end, if we don't grow revenue and have that grow at a significant rate, it really doesn't mean a lot. So I've done here is compared our revenue growth from the start, if you will, on 3 technologies: 65 and 150-nanometer were our 2 previous technology generations that grew the fastest and were the largest for the company overall. The blue bar here represents the first year of introduction. The revenue resulting from the first year of introduction from 150, 65 and 28-nanometer. So the first year of 28-nanometers effectively is this year that we're in, and Moshe talked about the $100 million cumulative revenue level that we have in essentially year 1, because almost all that was in this fiscal year. There's a little bit in the previous fiscal year, but not very much. The red bar on 150-nanometer and 65-nanometer indicate the revenue from year 2 in terms of actuals for those 2 technologies. The 28-nanometer red bar is our expectation for year 2 of 28-nanometer. So it hasn't happened yet. And that number we believe is more than double, could easily more than double the $100 million. In fact, our estimate is that it'll be $250 million of revenue plus or minus in the next fiscal year. So we feel very strongly about how well we're positioned across a very broad set of end markets, to be able to deliver in the neighborhood of $250 million a 28-nanometer revenue in the next fiscal year.

So now, I move away from the growth story and get into the financial model and specifically around some of the efficiencies we've [indiscernible] throughout the company. First, let me talk a little bit about R&D. So the graph here shows the growth rate of our R&D spending over the last 4 years. So it's been running at about 8.6% CAGR, which is a healthy growth rate but not necessarily out of line with the rest of the semiconductor industry. But with that money, I think we've done some very significant things. And we've created this very broad portfolio of 5 families opening up with SAM to be a much bigger number than we've had in the past, and we're now starting to penetrate that SAM.

We've also had a lot of product attribute or innovation going on. So best-in-class performance, lowest power, highest speed and highest bandwidth on connectivity. And then lastly, we, from a grounds-up basis, did an entire new software suite that allows our customers to integrate very complex designs much more rapidly and turn their designs much more quickly than in the old tools. This is really important to the success of our customer base.

Now if you look at it from, okay, what have we been doing and how fast have we been doing it, what I wanted to go through here is show you the amount of time it's taken to build families from history and then moving forward and show you how we've gotten more efficient, and we move much more rapidly in terms of getting parts out, getting devices out in a much more efficient way. The nanometer time frame, we produced one family and it took us approximately 2.5 years from the first production tape-out to the last production tape-out of the family members at 65-nanometer. So at 40 and 45-nanometer, we did 2 families. We did a high-end Virtex. We had a high-volume, low-power Spartan class set of products. And that took us about 1.5 year to do those 2 families of devices. So we moved to 28-nanometer, and 28-nanometer we did 5 families. So we did 3 core FPGAs. We did a 3D IC innovation and then a whole new processor SoC base family. And we've done -- we'll have completed that production -- last production tape-out in less than 2 years from the first production tape-out of that family. So we have really improved the efficiency and the capabilities of our engineering organization.

Now when you look at where the money is going and how we've been able to do that, the bars here indicate as a percent of total revenue, where we've been spending our money in R&D. So the red is the mask expense. The green is the nonlabor, and the blue is the labor expense. So as you can see, mask expense has been increasing year after year after year, and our labor cost as a percent of total have actually been declining.

And so how we've been able to accomplish this in a very broad portfolio and what -- how has that really masses itself. So first our selection -- our process selection of using the HPL process was an exceptional benefit for us to get products out very, very rapidly. And we had a tremendous amount of reuse of our IP capability because we essentially had one set of fabric in order to validate and characterize that again.

We've also improved our processes and tools broadly across the engineer organization. So each engineer is more productive, more automation, more ability to get more things simulated and validated, in these more complex devices much more rapidly. It shouldn't be lost on you that we were the first ones to introduce an FPGA plus an SoC, and we're not inherently a processor company. So the ability to have all 4 family members out in production now, very cleanly with very little errata, if any, this is really important that we invest -- that we have invested in our ability to characterize and validate those parts to get them out clean.

And then lastly, we really broadened our geographic footprint and it's lowered our cost per engineer. So if you compare 2000 -- fiscal 2010 to fiscal 2013, we're spending per engineer, 7% less. So these are all things that have helped us be able to get a tremendous amount of new product innovation out and do it relatively cost effectively.

So now turning to gross margin. Our gross margin is another really positive story. So our gross margin has been increasing year-after-year. So up and to the right, we've been in the -- able to operate here over the last several quarters at the top end of our business model range at approximately 66% plus or minus. This improvement in gross margin has been accomplished through a variety of individual programs and projects around cost reduction and price management. And we've gotten a lot more automated and a lot more sophisticated about this.

So we go through projects on a routine basis every 3 weeks. The team meets, review its executives. We go through things as -- it may be as minor as moving final test from high running products from 97% to 99%, and what is that dollarized in terms of what benefit that's going to give us. And obviously, those things are cumulative benefits that just pile up over time. Or we work on how we're going -- what our price strategy is around individual customer volume pricing agreements in order to manage that more effectively. So we've actually had a very organized and important focus by the executives of the company to continually work on cost.

So our projections for next year in the gross margin area is to continue to operate in the approximate area of 66% gross margin, the top end of our range. So looking at the guidance for next year, let me talk a bit about this. So 66% on gross margin, R&D between $460 million and $480 million, SG&A $375 million and $385 million.

So from an OpEx perspective, if you took the midpoint of those ranges I've put up here -- I'll put up here, it would be essentially flat spending to what we're going to spend in FY '13. So flat spending. So no growth for the company. So we do have upward pressures going on relative to share-based expenses and to some additional profit sharing and compensation for the company, but that, essentially, is being offset by the fact that we had somewhat fewer mask expense this year. This is one of our lower years. And we're actually aren't hiring very many heads across the company at all, and there'll also be some heads hired in the engineering organization but not very much.

And I want to remind you that we've spent in FY '13 40% of our R&D spending on developing 20-nanometer products. So we think we have a very good investment level in R&D. That's a lot. It's conferred a very broad 28-nanometer portfolio, finish it due to Vivado software suite and also have a strong hand at 20-nanometer with keeping flat spending for this year. So the rest of the items here which are at our current level of run rate, so amortization of intangibles, about $10 million for the year; net interest and interest expense of $30 million; and tax rate of approximately $14 million; and then CapEx spending, pretty much at a run rate of what we've been spending over the last several quarters, which should be around $30 million to $40 million on an annual basis.

So the last area I want to go to is capital allocation. This graph shows the amount of operating cash that we generated over the last 5-year period. FY '13 is going to be down a little bit on the basis of lower revenue and slightly higher expenses. As you've heard, the rest of our 28-nanometer product and a little bit more working capital use than we had in the previous quarter. If you overlay that, the amount of money we've returned to shareholders through both the dividend and share repurchase, you can see that we are a -- we have a very high percentage of return of the operating cash that we generate.

This year, we've repurchased approximately $200 million of our stock to date, and we continue to increase our dividend over time, and I'll talk about that announcement that we made this morning here in a second. Our strategy remains the same. We definitely will favor dividend first and then we're opportunistic on the buybacks. So we look at cycles in our business. We had some algorithms we set up of when we buy, and when we buy more, and when we buy less. And we have the capability in down situations to accelerate that repurchase. Again, that's our definition of opportunistic.

From a dividend perspective, we've raised our dividend every year since we've uttered it in 2004. This morning, many of you've seen that we have raised -- the board voted to raise the dividend $0.03 a share per quarter starting with a payment in the shareholders -- to the shareholders in June, the June time period. And we still have this commitment to continually review the dividend and increase it every year, assuming we are in the range of our cash generation expectations for the company.

So with that, let me kind of give a summary of the whole presentation up to now, and then we'll [indiscernible]. We really have done a lot with our R&D expense in terms of putting ourselves in a great position to grow the company, and we can talk about the competitive issues and who's first, who's second or whatever. In the end, it's about the top line growth. And we've become increasingly confident of where we are in that position by the fact that we've created these 5 families, and we're out there selling today in production-worthy parts in every one of those families, and that's what's important to our customers.

All these attributes in terms of lower power, higher bandwidth, lower jitter, all those kinds of things are definite examples of why we say we're a generation ahead. And the penetration that we have in the SAM is really phenomenal, and it's -- actually, we're been kind of leery about tracking these sockets, which socket was an FPGA and which wasn't, but we forced ourselves to you because we kept talking about the ASSP part is really going to come while the ASSP competition -- we're really winning in key slots where we have the value proposition where it really makes sense for our customers. And that's really rewarding, to be able to see that.

And lastly, we think we have a great growth story. We do believe we're going to grow in the next 3 years. We think we're being very fiscally responsible with the way we're running the company, and I hope you think so as well. So I appreciate all your interest in Xilinx. And what we like to do now is invite Moshe, Krishna and Victor up here, and I'll be the moderator for Q&A. We have microphones that we'd ask -- we're not really going to take the question until you have a microphone because we want to make sure it comes out in the web. We have 2 roving microphones. So there's a question up here in front. He had his hand up first.

Question-and-Answer Session

Vivek Arya - BofA Merrill Lynch, Research Division

Vivek Arya from Bank of America. One question, Jon, maybe for you and then one for Moshe, sort of related. You mentioned that you can keep OpEx flat next year. Does it mean that the year beyond that, as you start getting more serious about 20-nanometer, we should expect a bigger bump in OpEx? And then sort of related to that, the recent Intel announcement, if you could address that. The fact that they have signed this agreement, what are the competitive risks, if any? You see any impediments to the progress to 40-nanometers or finFET? And if Intel goes after some of your current customers, like Cisco for instance, what does that mean for your business? If you could address that.

Jon A. Olson

Yes, so first on the spending. We're really not forecasting FY '15. We do have a fair amount of tape-out in the FY '14 period. And some of that is related to our 8 series 20-nanometer-based products. So I would say that if I look at the run rate in total of the smaller year and the bigger year, it would indicate that we'd end up having more tape-out dollars in our next fiscal year. But it's not clear yet as to -- as how that's going to manifest itself in how much of an increase for R&D, but I think it'll go up some. But again I think we have a really strong case, and part of what we're doing here is -- it's not lost to us. We've invested ahead of the revenue, okay? And that's why we're doing what we're doing here. And we think we have a situation where we are going to grow, and in the top line, will put it back into our business model, while we're being thrifty, as thrifty as we possibly can without losing the generation head lead.

Moshe N. Gavrielov

Okay. So, thank you for asking the question. We somewhat expected that to come up. And here's the way I look at it. This is very reminiscent of the discussion that was blazing 2 or 3 years ago over how could we compete with HPL at the high end of the process offering. And we'll give you the handouts. I don't want to take you through the presentation, but basically what you can see is the 28-nanometer, and we just speak today, tremendous emotion invested in it. How could we, with a -- not the highest performance process necessarily compete at high end? So roll forward 3 years. We have the large capacity products. We have the highest performance products. We have the highest bandwidth products. We have higher throughput products. We have the best performance per watt. We have done that and in parallel, brought out 2 totally new solutions, which have at least a year lease on the SoC product and a lot more than that on the 3D product.

So despite the decision to use the HDL process, which is very distressing, we've demonstrated that we have by far the best product offering. And it's not just based on data sheets. It's now based on revenue where, as things turn out the way we expect by the end of this fiscal year, we'll shift 50% more revenue to 28-nanometer node. We'll be approaching that. So I obviously am not in a position to tell you how we are going to achieve the best solution at the high-end, but we've already demonstrated unequivocally that we can do that at 28-nanometer, right? And we will use all the ingenuity -- and it doesn't behoove me to share exactly how we're going to do it, to come out with the best product for that timeframe. So I am supremely confident that we will have the best, the largest, the highest performance solution. We've demonstrated it at 28. It will be very visible very soon at 20, and the generation beyond that, we're working on it.

Vivek Arya - BofA Merrill Lynch, Research Division

So just a quick follow-up on that Moshe. So does it mean your confidence is regarding the architecture? Or the confidence in TSMC to actually produce it or some combination?

Moshe N. Gavrielov

So if you look at what it took at 28, the software, which was designed from scratch was miles ahead. The silicon architecture, the process, the circuits, all of that were used in unique and innovative ways. All of those tricks and arrows are still in our bag, and we will use them to have the best solution, right, at that point in time. And so it's not just one element, it's a whole group of elements that contribute to that. And look at what we've done -- look at what we've achieved. Hark back 3 years and think about that huge discussion. And that explicit question was asked. I said, "Watch us." And not only are we hearing this broadly from our customers that it's very -- you just look at the data sheet. All of these elements truthfully, the one which is the largest is the software. And that is the biggest investment we have made. It is a foundational investment. The amount we invested in that area over the past 4 years is in excess of 1,000 man years. It really is something which was put in place. It today enables our customers who are comparing products, they are seeing 20% better utilization in our design than in competing designs at the key customers. And that in of itself is actually more than a generation. So it's not -- that's just one sort of element. And the combination of all of the -- and the fact that it was all designed from scratch to achieve this. Some of these were totally designed from scratch because we didn't have the best [indiscernible] in the industry, now we do. But due to -- it's a whole host of things. That's what will enable us to provide the best solution.

Jon A. Olson

Okay. So we got over here.

Romit J. Shah - Nomura Securities Co. Ltd., Research Division

Romit Shah from Nomura. I think of your business as being high turns, low visibility, but your outlook on CapEx spending seems to be improving. And my question is, what's driving that? Because if we look at the carriers outside of AT&T, most of them are still talking flat to down for this year.

Jon A. Olson

So Krishna, do you want to take that one?

Krishna Rangasayee

Yes, so it's a good question. And so I think we look at CapEx as an aggregate across service provider IT and government spend, right? So from a wireless perspective, clearly, I think that the U.S., we have a couple of carriers that are moving ahead with LTE. We do expect in the second half we are going to see TD-LTE deployment happen in China and also in a lot of other geographies. So from a wireless perspective, we think that the momentum that the U.S. market has today is going to scale into a lot of other geographies. That's the wireless element of the story. From a enterprise IT, government spend, we are looking at each one of those trends very carefully. We look at where the investments are being placed. And in one of the slides that I have shared with you today, I mean, that's the outlook that we have for the rest of the market.

Romit J. Shah - Nomura Securities Co. Ltd., Research Division

So just a follow-up in terms of trajectory, we should think of it as a back half of 2013 story?

Krishna Rangasayee

From a wireless perspective, yes. But for wired communications, I think if you look at the time period of CapEx investment to equipment being shipped and correspondingly with design wins, we believe that the design momentum for wired communications will start in the second half, but will continue for a longer time period.

Jon A. Olson

And make sure, Romit, that you remember all the things we talked about, the sockets that we won, the design wins that we won that were ASSPs. This is one of the spaces where we're really cleaning out in ASSPs is in the wired -- in the wired side of things in particular. So it's a bigger footprint. So yes, you could have CapEx not being growing at a lower rate than what our revenue growth is in that category just because we are expanding where we're going. And that's part of our story. Oh, Chris?

Christopher B. Danely - JP Morgan Chase & Co, Research Division

So just to dig in on the Altera Intel elephant in the room. Were you guys approached by Intel for the foundry business? Did you pass on it? Why or why not? Altera Intel are talking about 14-nanometer at some point next year. Do you expect to have 14-nanometer out? Do you think that, that's an unrealistic goal from the competition? Could you just give us a little more color on sort of your reaction and response to that? Why you feel so confident that beyond 20 you'll be able to maintain or increase your market share?

Moshe N. Gavrielov

Sort of a repeat of the same question, but just sneaking in through the window as opposed through the front door, but nonetheless I will respond.

Christopher B. Danely - JP Morgan Chase & Co, Research Division

Sounds like, come on. I'm a lot shorter, it's easier for me to go through the window, [indiscernible] under the door.

Moshe N. Gavrielov

I share your pain. I share your pain, young man, believe me. So fundamentally, at any point in time, when we look at a new process node, we look at what is available throughout the industry. And every node we have done that in the past, and we've made some decisions. We consolidated previous nodes with UMC, with 28-nanometer and on. We have moved to TSMC. But at every node, we look at what is available, and there are 3 sets of criteria. The first criterion is price. The second criterion is technology. The third criterion is the service level. Because fundamentally, the FPGA industry is a very high mix, extremely low volume, low timeframe with a lot of specialized requirements, which requires a considerable dedication to service levels, which our customers' demand as I'm seeing we go through our foundries. And so we have done that. With each node, we do that, and we look at who is the best at all of the elements, and then we use our development team in a judicious way to come out with a superior product, right? And we've demonstrated that and so we have gone through that process for each node, including foreseeable nodes. Victor's R&D team has invested a lot in 20-nanometer and already has invested quite a bit in the generation beyond that. And we believe that with the combination of all of the elements, we will absolutely have that solution. As -- this question was asked 3 years ago with a very, very -- and it was a valid question at the time. It was, you're new -- you're working on a new process, so it's a whole host of fabs thrown on the new process, which was HPL. The results speak for themselves. So my level of confidence in delivering is extremely high as we've gone through this process. And 28, we've shown you; 20-nanometer, we expect to be there ahead of any significant FPGA competition, and we will be in a great position at the node beyond that.

Christopher B. Danely - JP Morgan Chase & Co, Research Division

That's a nice segue to my follow-up. At 20, what product family is coming out in Q2? And do you expect to have all of the families out this year? And then how do you contrast that versus the competition? When do you think they'll start to have 20 out in the market?

Moshe N. Gavrielov

The only element we've talked about is what we've announced to date. And we obviously will be announcing broader plans, but this will be a very significant node for us with a large number of tape-outs and a significant coverage of the target market. But no, we haven't announced that to date, and this is not the forum which we are going to announce those details. With regards to the competition, we haven't heard a lot. I'm sure they have proactive plans [indiscernible] and look forward to that.

Rick Muscha

Jim?

James Schneider - Goldman Sachs Group Inc., Research Division

First question is actually just following up on Chris'. Given that I would imagine the preponderance of your fiscal '14 spend in R&D is going to be on the 20-nanometer node. Is it fair to infer that whatever the product portfolio looks like, there's probably fewer products contained given the flat spending in 20-nanometer versus 28?

Moshe N. Gavrielov

So we intend to have a fabulous series at 8 product portfolio, which builds upon the momentum on the series 7. And there are different trade-offs which will be taken as a result of it being a more expensive product. And there's a whole host of things, very -- taking the approach of a scalable optimized architecture to the next level in saying 3D solutions, where it makes sense, and there's a whole host of things that we will do and this will be done within that same, very substantial envelope that we have defined and Jon has communicated.

Jon A. Olson

I think the 3D -- don't get lost -- don't forget about this vector in the 3D architecture solution based on work and second-generation advantages and containing those kind of costs using that.

James Schneider - Goldman Sachs Group Inc., Research Division

That's helpful. And then as a follow-up, last year, Jon, you talked about the fact that you looking forward 200 basis points of share gain from Altera in the past fiscal year and then another 100 basis points looking into fiscal '14, which turns out that you've got 300 basis points all in 1 year. So as you look forward into fiscal '14, do you feel comfortable of projecting further share gains versus Altera for the coming year and why or why not?

Jon A. Olson

Yes, so from my perspective on that is, we do feel confident with how well things are going at 28-nanometer, and as Moshe talked about, what we think is our very strong leadership even early on, and I think this is only going to build as we go out. So from that perspective, I'd say, very much so. 40, 45 new section of our new product has been growing very nicely, and this is actually the one that I actually scratch my head a little bit, Jim, as to why isn't the competitor even doing better on that than they seemingly have been because we've been gaining share even at that node. And if that kind of dynamic continues to hold, which I think is very possible, then yes, I do think we will gain additional share this year. But I think it's really -- I'm very confident on our 28-nanometer growth outpacing them. I'm just not 100% sure what's going on in the 40, 45 yet. I mean, we're continuing to grow there. We have the low-end product and they don't, and that's continuing to grow for us. And so I suspect that some of that is equalizing out whatever they have going. And that leads me to believe, yes, we're going to have a pretty decent chance of growing share next year. Back there and then we'll come up.

Unknown Attendee

Some of your fabless peers have talked about seeing a flattening of the transistor cost curve. And 1 of the 2 questions I have on that topic are one, are you seeing this also? And if so, does that mean that transitions to new nodes are going to be slower? Would you expect 28-nanometers to be a more prominent node for a longer period of time?

Moshe N. Gavrielov

So why don't I give you a quick overview and then I'll hand it over to Victor. It clearly has been well-documented that Moore's Law at least in terms of the economics is slowing down, becoming more expensive and more difficult to come out with a new node. What that implies for us is, we need to work harder. And we need to apply a whole lot more innovation, and we need to invent new things, which take the edge of that -- those additional costs. And I'll hand it over to Victor, who will -- who he and his team do hard work so he you can share some of the things with you.

Victor Peng

Yes, I think as Moshe said, it is an industry-wide trend. So technically, people see higher and higher geometries, but I think the expense of achieving that combination of [indiscernible] and first principles, because there's also some market dynamics that sort of weigh into that. Nonetheless, we expect that for certain applications, you always are going to need to move to the most advanced node. But other applications that don't necessarily demand all the characteristics of that next node, there are things that you can do in architecture, we think that's as strategically in the 3D IC technology that Jon mentioned, and again, what that enables us to do is to get, I think, heterogenous architectures that are either not possible with monolithic silicon or are economically possible with monolithic silicon. Like in terms of 2,000 feet, 2 million logic cells at 2x the density of our competitor in exact same process technology generation and the same foundry. So were going to innovate, like Moshe said, both in terms of architecture, in terms of software, in terms of IP value-add and in terms of what we integrate in. At the same time, we will continue to be on the leading edge, like we said, at 28-nanometer we're the first in the industry to deliver silicon, we're in good position to possibly do that again at 20. And we started investing in 20 actually back in 2010, not going to talk about it much, but yes, we're definitely beyond that as well. So I think we will continue a very deep pipeline of products.

Rick Muscha

Okay. So we'll move over to Ian and then take Ambrish.

Ian Ing - Lazard Capital Markets LLC, Research Division

Ian Ing, Lazard Capital Markets. First question is for Krishna. You talked about smart HetNets being a growth driver. Could you talk about when you think that occurs and where exactly you're exposed? And also why wouldn't macro cell displacement and some of the SOC switch into these small cells offset that growth trend?

Krishna Rangasayee

So I think it's almost 3 questions in 1. So I'll try to be concise with my answer.

Ian Ing - Lazard Capital Markets LLC, Research Division

Welcome to my world.

Krishna Rangasayee

I think -- I mean, the one thing I want to clarify is, it's now proven that it's a misnomer that small cells are going to grow at the expense of macro cells. That is not going to happen. The small cells will coexist with macro cells. One shooting for coverage, the other one shooting for capacity. And one makes the other better. So take an urban density like this, if you have the coverage, but what you miss is the data capacity, and that's what's your tolerance. So small cells will bolster the macro cell's ability to get both capacity and coverage together. And this has been a debate for a long time, but listening to every carrier, listening to every customer, I think that debate is behind us, where small cells will coexist with macro cells. So one is not going eat into the other, and it's TBD or yet to be determined on how much each one is going to accelerate the other. So that's one of them I'm sure. Heterogenous networks are already happening. And so it's been much debated, much talked about for 7 or 8 years now, but we are seeing that they are happening in the urban areas primarily. I think we are beginning to see the U.S. step into it. Plenty of our size that are being floated by the service providers for small cell networks with HetNet. We are seeing that in the U.S. We are seeing that in Japan. We are seeing that in South Korea, and it's going to take a while to see how it's going to play out in these geographies beyond that. But we definitely think that small cells are going to be a persistent trend, and they will be shaping up. How they get deployed will become very nuanced, and it will not be a 1 site per site award. So we'll have to wait and see where things are going along.

Ian Ing - Lazard Capital Markets LLC, Research Division

But obviously, there's a lot of different size small cells, so your market...

Krishna Rangasayee

I'm sorry, could you...

Ian Ing - Lazard Capital Markets LLC, Research Division

Obviously, there's a lot of different sizes of small cells, so you're more above the play metro cells versus femto cells, is that the right framework?

Krishna Rangasayee

The area of small cells have had too many names that have been redefined, so the easiest way to look at our fit is anything more than 64 users, so which is enterprise play. And so we do not plan to participate in the consumer side of macro -- consumer side of small cells. Anything more than 64 users we believe are our primary focus. We are designing a few systems that are 32 users and such. But our priority is to stay in the enterprise side of the small cell, which is more than 64 users per session.

Ian Ing - Lazard Capital Markets LLC, Research Division

Great. And second question on Zynq briefly. There was a slide on design wins there, the percentage in terms of comms exposure seems low, but you're saying that's growing. How do you see that growing towards more Kintex or Virtex kind of ratios? Like what has to happen? Do you have to displace multi-core processors, et cetera, to get Zynq to be that higher comms ratio?

Moshe N. Gavrielov

I'll take the lead-in portion of it now. I'll ask Victor to give his perspective as well. So any of the communications, ISP vendor, I mean, communications customers has a lot of legacy code that have been more than 20 years of use, if you will, that you have to go into. So from a silicon perspective, the value proposition would be, we need to step into the software value proposition and have a combined outlook really be the tipping point where the value proposition not only brings value to the silicon piece, but also to the software side of it. We were off to a slow start in communications, but we clearly think that communications will drive about close to 40% to 50% of our long-term design momentum and revenue in the same status. We have a very strong promise regarding Zynq [indiscernible].

Victor Peng

Yes, and I guess I just sort of reiterate. Kintex was focused very much on wired communications. I know it's the first 28-nanometer product we did. Zynq came out a few quarters later and some of our lead customers were in the other applications, so I think it's just a start-up kind of issue, but I think more importantly, you should think of Zynq completely beyond the typical market we serve, right? That is be the big thing here is a new product category and customers are really excited and they're doing certain things that we wouldn't even have thought of. I mentioned the fact that we have overall 100 third party partners in the ecosystem, truly building, adding value around the platform, right? So I think we're just sort of -- I wouldn't think of it in terms of our typical footprint because I think we're going to be growing substantially into areas that we weren't in place before. And part of it, I also mentioned how in the future you'll see us constantly improving the software tools around that, and that means both software, -- the software, software tools, right, software development kit, compilers, OSes and so forth, but also just to help people optimize between what's in the programmable hardware, as well as what's in the programmable software. We're doing some things that we're not prepared to announce that now. But I think enabling that is going to see -- help propel a lot more of the SAM extension that Jon and others have discussed.

Rick Muscha

Okay. Ambrish?

Ambrish Srivastava - BMO Capital Markets U.S.

Just tieing back Krishna on your comments and Jon's 3-year guide: a, why should we believe because in comms, we have seen so many fits and starts. A, why should we believe that this time it's going to be different? And B, is it related to just trying to understand the underlying reasons for the confidence, is it related to 28 opening up newer opportunities? Or is it the design wins that you have won against ASIC ASSPs? So just please help us get below the first of 2 layers.

Krishna Rangasayee

I'll take my lead and maybe Jon can comment as well. So if you look at the macroeconomic, CapEx has really been a very murky outlook and almost anything that's written has been wrong. So I mean...

Ambrish Srivastava - BMO Capital Markets U.S.

[indiscernible]

Krishna Rangasayee

So I mean, it's very hard to peg your hat on that alone being the true lead indicator, right? But there's too much validation from customers and carriers, and I spent a lot of my time on the road visiting customers. And leads me to believe that wireless and wired will have persistent CapEx outlook for the next 3 to 5 years. So that's a good thing, but that's not the end of -- which I think we are comfortable in planning behind our numbers. That's a good envelope. It's a necessary element, but not an established one. The second area of where we see a lot of growth is really in wired communications, 100 gig is taking off like, I think the fastest growth on any particular investment that we have seen. And maybe the closest thing that can parallel to it would be the 10 gig, which was 7 or 8 years ago. So 100 gig is growing at 2x the rate and adoption is much higher than the 40 gig now. That opens up a lot of doors for us from a growth and a customer momentum perspective. The third element is, even if the CapEx environment is murky and even if the customer buy and spend is murky, the amount of displacement of incumbent ASICs and ASSP that we are getting give us a lot of depth and credibility that we think that we got the design win momentum and the customer acceptance that allows us to stand behind these revenue and CAGR growth numbers. And combine that, that's where we believe the market shifts are happening from a competitor perspective. One, the [indiscernible] the ASIC and ASSP are, that is beyond the envelope of why we are comfortable that we can stand behind these CAGR numbers as we look at both wired and wireless. Jon?

Jon A. Olson

I think what I would add to that is, part of my job is to make sure that we don't get too enamored with our own marketing messages around that, maybe you think I already have, but if you look back at our previous 2 generations 40, 45 and 65, the longevity of those seemed to be longer and bigger than our previous generations before that. So we do feel like we are getting a tremendous amount of return in some of the end markets that have had longer lifespan characteristics out of some of our existing technology, and there could be a lot of things relative to the macro overhang that's driving that. We could all come up with reasons why. And so that makes me feel like we have a very strong base over the last couple of years that will allow us then to take this 28 nanometers strength of all the things that Krishna just talked about and build upon that and we get up to another plateau, let's say. As you remember, we've kind of -- we're $1.8 billion for 5 years in a row, and we kind of jumped up and been around $2.2 billion, $2.3 billion if you move out the peak year in there or whatever. And we're pretty confident there's another plateau being driven here because of the 28-nanometer, and it is like -- remember that chart of the red and blue vertical line, customer A, B, and C. Of all those designs that were not FPGA sockets that we've won, and this is at much higher rate. So we could be fooling ourselves that those don't come home to roost, and we have a very aggressive de-rating schedule in the company where we know that people compete with each other that we sell to and all those kinds of things. Anyway it comes out, it comes out growth is going to happen. So until it does, I guess I can't prove who's right or wrong. John?

John W. Pitzer - Crédit Suisse AG, Research Division

Jon, a couple of questions here. Maybe first as a follow-on to the growth question. Just Krishna, when you talk about specifically the LTE opportunity and the 100 gig OTN opportunity, how do we think about incremental spend, true growth to the company versus just displacement spend on 3G and current 40 gig? What's the content story? What's the growth story there for Xilinx? And then I have a follow-on question.

Krishna Rangasayee

Okay. I'll take the -- by the top 10 customers that represent a large portion of our communications revenue, we have the highest visibility into -- are we just cannibalizing previous FPGA sockets from generation to generation? And/or are we really displacing entities like ASICs or ASSPs or DSPs that will clearly represent incremental growth for us? I'm assuming that, that's the premise of your question. How much of it is cannibalization of our own previous business versus new growth? So at 28-nanometer, the combination of the IP that we have, we are participating in a lot more opportunities than we have traditionally done before. And we believe that very little of our growth projections here are coming at an expense of cannibalization. Most of our growth, if not the majority of our growth is really coming and displacing ASIC and ASSP. Though 40% of all the revenue design wins that we have had come at the cost of ASIC and ASSP, from a sheer dollar amount that is a very staggeringly different amount than we have traditionally have participated. So -- and that goes back to the previous question I think which has really been saying, how confident are we of the numbers is? If there is just traditional FPGA logic business, I think our level of confidence would be much lower. We are displacing entities and competing with the who's who in the ASSP and ASIC market, and this is our day-to-day primary competition. So our competitive landscape is no longer just us versus our immediate PLD competitor. It's us winning business against ASIC and ASSPs. And from that perspective, I think I'm feeling very high confident that mostly it's incremental growth that we have got.

John W. Pitzer - Crédit Suisse AG, Research Division

And then as a follow-up, Moshe, just getting back to that Intel Altera announcement. Relative to your confidence level on FinFET being available on a timely basis at the foundries, how do you feel about the roadmap for FinFET at the foundries? And Jon, is there anything about FinFET that will require incremental R&D as you guys try to move the product families on to that process node?

Moshe N. Gavrielov

So evidently, there is more than one window. But you know -- let me sort of disclose to you that as you may get in my hairline about being in this industry now for more than 10 years, and when I started in the '70s, there was going to be -- the world was flat and when you got to 1 micron, you fell off the edge and there would be no continuity. And with each year that went by, a huge level of investment was made in order to solve all of those issues. And this sort of continued, and it's to the credit of the semiconductor industry that this has continued now, so I think it's 60 years, and I actually haven't been that long around and I'm looking at Jon just so, he is older than I am.

Jon A. Olson

Hey, not by much. Not by much.

Moshe N. Gavrielov

But so this significant improvements that are made from generation to generation in order to enable us to move forward and consistently that has been done and there's an entire ecosystem, which is motivated for those improvements to have broad applicability, otherwise there is no semiconductor industry because you can't just operate when there's one customer in an industry, right? You need to have several, and so the entire ecosystem is set up to enable that and for that, and I expect that to continue. With that, I'll turn it over to Victor to maybe share some of his thoughts.

Victor Peng

Sure. Again, I want to remind everybody that actually at 28-nanometers, right, is a pretty significant transition to this high gate -- high-k metal gate technology, right? There's a fundamental transition in the way transistors were developed and 28 is also going to be one of the most successful, if not the most successful node ever for Xilinx, right? So some of this is -- yes, there's some challenges. I'm fortunate to have an excellent technology and design team. We blazed a trail in the industry, not just in PLDs, but the industry in this 3D technology. We're the only ones shipping a production product, right, with through silicon via technology, extensive micro-bumps with silicon interposers, and we've done it in 2 instances, both heterogeneous integration and 3D technology, as well as homogeneous side. So I think the innovation will be there in places where again, it makes sense. We're going to be there because that's what we do. We like to build leadership products. TSMC has got a roadmap for FinFETs. They've got roadmaps beyond that. Samsung, GLOBALFOUNDRIES, everyone else are all there. You caught me -- since you followed us, you know that we really have the history of working with multiple foundries. And we have really good visibility into this -- of the advanced technology. We're at IMEC. We're at many different consortia. Again, especially in the 3D area since we have leadership there. So yes, there are challenges, we had challenges before. It makes it exciting. And it's just another opportunity to innovate and deliver things like we have at the 28-nanometer node. So now don't you worry about...

Jon A. Olson

What I'll say John is, competition is good sometimes for costs, kind of I'll leave you with. Some competition I think will make the cost aspect of the thing -- aspect of this be more rational, more in line with the benefits of the process.

Unknown Attendee

[indiscernible].

Jon A. Olson

I'm not willing to make that claim at this point in time because I think this is very, very early. I'll just remind you, this announcement came out a week ago and et cetera. So there's a lot yet to be discussed and understood.

Steven Eliscu - UBS Investment Bank, Research Division

Steve Eliscu with UBS. With regards to the 8% to 12% CAGR forecast that you gave us for revenue, to give us a baseline, what is the underlying assumption for the semiconductor industry growth during the next 3 years? Just so we understand what you're thinking in terms of your relative outgrowth versus the industry.

Jon A. Olson

Well, we didn't use that to create our numbers, so -- necessarily. So -- and I'm not a representative of iSuppli or a gardener. So I don't really know how to answer that question. I've -- what I've seen is a variety of numbers, anywhere from 3% to 5%. I don't see difference in 7%.

Moshe N. Gavrielov

So the common wisdom is that it will grow the slower rates on average than it has now. It tends to vascillate anyway, but 8% to 12% would be higher than the growth of the semiconductor space. And this is based on capturing market share, displacing ASICS and ASSPs. So it's not just sort of looking at it as a commodity industry. It does require displacement.

Steven Eliscu - UBS Investment Bank, Research Division

Of course. That's part of my follow-up. It's just -- the reason I asked the question is this is Ambrish's concern about we expect this type of growth in communications, yet we've seen in the last couple of years some challenges. But it does lead to my follow-on question, which is in terms of what you talked about the growth being faster than the industry is capturing bill of material share. And if you could give us some insight into some of the strategic processes that have gone on in Xilinx the last couple of years, how you've improved them to identify the specific opportunities where you can capture bill of material share, whether it's an ASIC or ASSP, the type of IP that you had to develop, things like that, that can give us some confidence that your ability to sustain outgrowth since you've had challenges in the past prior to 28-nanometer.

Moshe N. Gavrielov

Okay. So what's basically -- one of the fundamental stories -- and if you look at the last foil [ph] I presented, which is typical my first foil [ph], is the middle column, which is integration, right? And basically, if you look at FPGA 10, 15 years ago, it was just logic. And it was logic and memory and ASSP cores, microprocessor cores and high-speed 30s and communications protocol. And so if you look at our customers' board, circa '90 -- late '90s, you would have seen a lot of components on it, a lot of base RAM, a lot of discrete components. If you look at their boards now, they actually have a lot less components. And what has happened is a lot of those components have disappeared. And guess what? They are largely implemented inside the FPGA. So it's part of our strategic planning as we see this integrate or be integrated [indiscernible], which is driving the industry. We are looking at technologies that can easily be integrated in with the FPGA logic and benefit from those trends. A lot of the elements that I described benefited from that. And now we're expanding beyond that because we've recognized that not everything benefits from that level of integration. So moving forward for some technologies may provide you with a more expensive or inferior solution, that's one of the benefits is the heterogenous integration we do with the 3D IC. So part of our strategic planning is looking at those elements and figuring out how to -- how much to invest in each of these areas. One of those, which we alluded to and we've actually discussed in the past, is the bigger investment in mixed signals, which, in particular, is germane to the low end of the product offering. And so it's a relatively complex equation, and it changes based on -- we have a broad range of product offerings. So at the low end, the solution is one. At the high end, the solution is another. It also changes on the -- based on the application we're trying to service. But if you look at the diversity of technologies which are being integrated, then -- there is nothing as complex or as diverse as an FPGA now in the semiconductor industry. It doesn't push performance in the same level that microprocessor does. There's a lot more elements than there are in advanced microprocessor. And making those decisions correctly is one of the challenges we have. The other challenge is figuring out how to make that available to the customers, and that's why Vivado is so important because it actually enables the customer to program all of these in an effective way. So you're asking a great question, and we could spend a week talking about it. But those are the general things we do, and you can see based on the product offering where we've ended up.

Jon A. Olson

So Steve, maybe to be helpful. So Krishna has talked a little bit -- if I understood your question correctly, if you look -- remember, in my chart, in -- on the wired segment, where data center was small or nonexistent going to something bigger. How do we decide that was the right place to go? And how effective are we? So Krishna, maybe you can talk about how we decided that was the right place to go and why those attributes worked -- why we have products in IT, et cetera, that worked well with that?

Krishna Rangasayee

I think -- I mean, I think some PowerPoint is easy to figure out where market opportunity is. The big delta to us is we now have a dedicated team of 200 people that are not at Xilinx before, 2.5 years ago, that are all in the comms industry. They were people that built products in the communications market, either customers and/or ASSP companies. They're helping us, if you will, map out where the market opportunities are and how to take our value propositions and tune them to exploit the opportunities that we touch, okay? So that's the big delta. I think they are not organically just become -- moving from a logic company into a communications company on our own accord. We are using, if you will, the talent that's available to us and really helping them, if you will, help us [indiscernible]. And so the gentleman who manages the wire communications business was the leading processor company for a long time, as an example. So they have been in applications where the used model is quite different than an FPGA, but they know how to really come back and articulate to us what changes we need to instrument from the silicon, from the software product definition and IP perspective and line all of the value propositions together to effectively end up giving the value proposition that customer cares for. So that's the big delta between, I think, the company we were to the company we are today.

Unknown Attendee

I wanted to give you a chance to respond to your competitors' comments about the 3D homogenous product that is sort of a prototyping-centric product. And can you talk about -- give us a sense for sort of -- you talked about it as the cost per gate, actually, or cost per logic element is lower on those implementations. Can you give us some color on how you see those projects moving to production and kind of what you see is the relevant difference in cost if it's cost per logic element or however you want to look at it? And will it fully participate in the growth in 28-nanometer in year 2?

Victor Peng

Yes. So I don't know if you noticed, those 2 examples we gave were not prototypes. Even though we have reached strength in prototyping and emulation, right, there's a great demand to that, but no one semiconductor manufacturing equipment, right? And then we had enough persuasion where we were in communication, where we're in a broad set of applications. So I think it's -- honestly, I think it's a complete fuss, and so to say that this 2000T is really just about prototyping. And it doesn't go away, right? I mean, go talk to Intel, go talk to NVIDIA, go talk to QUALCOMM, they need to prototype and development systems that they could do their software and hardware development in parallel. But we're really in much more bases, and it's all about system integration, right? You saw how we were able to reduce chip -- the number of chips in the system by a factor of 2, in multiple scenarios. It also dropped the power because you don't have all the interfaces driving all these data signals between the chip's learning power. It simplifies the board design. So, in fact -- I mean, the value that you add to the system, you could be saving the customer cost of the system, and you could still maintain great value in the cost of your device because, overall, what they care about is the cost of the system, right? In other words, we're displacing other things. We're simplifying other costs in their system, and we can command value for that, right? So I think I'm also leveled, right? It's not just our prototyping and emulation. We see it in broad markets. It's a product that has no competition, and it's really helped the customer on performance, power, system costs. And with that, we can maintain the value of our products.

Jon A. Olson

So one of the product family -- one of the product members of this in the 2000T is the 1140T. And maybe you can talk a little bit, Krishna, about its application and communication with the high bandwidth stability that it provides.

Krishna Rangasayee

And I think -- I mean, as Victor mentioned, we are now able to extend what Moore's Law can provide to us and more so, into applications which we never could have serviced and/or in certain areas where there's no competition at all. So from a 1140T, which is one of the 3D IC products that we ship, cable head-end systems, L2 switches, Layer 2 switches, applications that are fundamentally, heavily pivoted on switching capability and also by de facto, 200 gig and 400 gig OTN solutions, some of these applications, there is nothing else available in the market that can match these applications. There is no competition for these capabilities just because of what we've been able to package together. And these products were built for production vehicles, not necessarily prototyping. And the other embodiment at which is a heterogenous die integration is we have a product where we have 16, 28 gig transceivers that are combined with our FPGA fabric. And this is opening up new applications that customers have no other option other than the market. Gearbox applications are value-add. We are the only solution provider in the entire market today to these areas. And so we are pushing ourselves into production entities but also, more importantly, pushing ourselves into opportunities where there's little or no competition.

Victor Peng

So, again, the 2 instances I showed we have many others that uses 3D technologies, one was optical transfer network and the other was semiconductor manufacturing. I could have listed many more that is not in the prototyping and emulation space.

Unknown Attendee

That's very helpful. And just as a follow-up, I mean, is the selling proposition that you can do projects with [indiscernible] that are bigger than you could do in any other product? Or is it also cheaper because of the fact that you have smaller die and better yield [indiscernible]?

Victor Peng

Well, 2 things. One is, again, in terms of the 2000T is capacity, which means you can do this in a number of discrete chips that you have in your system, again, reducing maybe at a system level of both -- certainly power, as well as costs. But it's also the integration of what else we put in there. So Krishna alluded to and I mentioned in my example 20 gig, 30, that's a completely different type of chip. It's a different process technology. That's what we were referring to as heterogeneous architectures and heterogeneous 3D IC. And you'll see more of it. In the future, you'll see us [indiscernible] don't get me wrong, but, yes, we'll look at memory because memory is another bottleneck, right? There's many standards that are doing higher and higher performance, really difficult to implement on the board and the chip interfaces because they can't get enough bandwidth between memory into the processor or the FPGA or what have you. So that's another clear area of integration, and we've been working with memory. We've been talking to memory providers, working on the standards committee, there's something called HBM, high bandwidth memory, and other standards. So this is -- by the way, I mentioned it being strategic. What do you do when Moore's Law is slowing down economically? These heterogeneous architectures where you could reuse different technologies, not necessarily always the leading edge but maybe also specialized technologies for memory or for analog, that's where I think there's a lot of innovation, and that's why we invested in this. And we're first out in the industry with this kind of technology.

Stacy A. Rasgon - Sanford C. Bernstein & Co., LLC., Research Division

Stacy Rasgon, Bernstein. I have a higher level -- maybe dumb question, but I'll ask it anyways. At 28-nanometers, what sort of ASIC or ASSP node do you think you're actually displacing? How does that threshold change as you go from 20 and then onto, I guess, 14, 16? And the reason I'm asking that, I'd like to get some feeling for whether or not the extending gap you have to ASIC, is that more a function of the fact that there are lots of new low-volume but high-value applications that need it? Or is it more a function of the fact that the ASIC market is simply slowing because it's getting harder to move? And in that environment, have you managed the risk in light of, I guess, current foundry roadmaps that may be overly optimistic? How do you manage that risk of keeping that gap? Is the, I guess, the risk that ASIC node migration could speed up less than the risk of having issues on the leading edge, basically, the risk of that slowing down?

Moshe N. Gavrielov

Well, let me give you an overview, and then Krishna, I think, is the best person to talk about what is happening in specific markets and what we're displacing. But, overall, if you look at what's happening in the ASIC market, it's becoming -- not in terms of total dollars but in terms of opportunities, it's shrinking rapidly. The reason it doesn't shrink rapidly in terms of overall dollars is there's still a large number of -- actually, a slow number of very, very large opportunities, which tend to have consumer flavor with them and they go into cell phones, et cetera. Those are not the ones that we displace here. If you look at the traditional ASIC industry, then look at the incumbent, they're all fleeing, IBM, FTE, TI, the Japanese. They're all, by and large, marginalized or gone, and there's a few what I would call sunset players, who are grabbing the remnants of that. And then there's a few who are chasing the very, very ultra high-volume players. So keep in mind that the number of players in the industry is actually dropping, and there's pure and pure that are being done, right? And that doesn't change, right? As long as we continue moving forward, then we have the edge. And Krishna can share with you what is being said with displacement.

Krishna Rangasayee

Sure. And that's some icon?

Jon A. Olson

[indiscernible].

Krishna Rangasayee

Okay. So I think I shared some numbers with regard to -- from an ASIC perspective, 28-nanometer. An investment warrants a return of $400 million to $800 million to justify it, right? And today, across our top 10 customers, we see less than 58 -- 5-0 ASIC [indiscernible]. And a 28-nanometer is less than 20.

Stacy A. Rasgon - Sanford C. Bernstein & Co., LLC., Research Division

But is your -- is your 28-nanometer FPGA replacing a 28-nanometer ASIC as replacing a 90-nanometer ASIC?

Krishna Rangasayee

No. Right. So I was going to get to the next -- so that's the envelope of where I think we see shrinking ASIC [indiscernible]. Most of our competition today is the 65-nanometer rate, so typically a generation or 2 behind us. And if there is 3 generation gap, invariably, I think our value fraction just gets almost black and white. So our competition is primarily to the 65-nanometer ASIC and increasing with 40-nanometer ASIC. Our competition traditionally, previously was really cost base, so there's a node delta between 2 nodes or 3 nodes. The FPGA value fraction gets stronger. Clearly, as we get to 20, that opportunity again increases for us at the company. But the number of viable ASIC suppliers was dwindling, and customers are now redefining their boxes to really build around FPGA. So the big shift for us from a footprint from customer engagement was the use of design for ASIC and ASSP, and then they would consider an FPGA. Today, it shifted the other way around. If it could be done with FPGA, they'll get us done with FPGA. And if it cannot be done with FPGA, then they have to go chase the [indiscernible]. So what used to be a cost-based decision is now really becoming a value proposition, IP, flash, market competitiveness position, right? Not to say that ASICs are gone, I mean, there are a few key ASICs that customers are going to build, but the number of opportunities to justify it and credibly deliver it to meet the market criteria is in a very small number.

Victor Peng

[indiscernible] I'd like to add that. I would say though that we have [indiscernible]. I mean -- and there's 2 elements to that, having said earlier that we like a challenge and we're not afraid of the end technologies. Not everybody can cut it. So we really have some of the best SerDes in the industry, not just TLD, just in the industry, right? So we -- our customers tell us this isn't just our own bravado here. And there are other elements. This is very difficult to do with that technology. We haven't fixed [indiscernible]. We work together on this 28 HPL process. They don't do that with everybody. So you need to be very de-technically... And you have to have the market and the economic justification, and then you have to have the chop to execute, frankly, right? Not everybody has that.

Stacy A. Rasgon - Sanford C. Bernstein & Co., LLC., Research Division

So if the foundry roadmaps get slower, if they push out, can you maintain that value proposition given that environment?

Victor Peng

Sure. I mean, again, process is very important. But as we alluded to earlier, we got to these advantages not just by process, right? We have architecture, we have integration technology, like the 3D technology. So there are many Moshe tried to articulate, there are many tools in the tool box. So we will stay on the leading edge of technology, but not every application necessarily needs that. You always have to look at what's the right balance of everything that's really needed. And we feel pretty confident that we can move to that next generation but also keep creating value in still very advanced technologies but not necessarily having to move everything to the next node. So we have other options, we talked about 3D IC. Zynq in particular, again, from a software element perspective and what we could do to expand our user base through enabling better ease of use to that kind of technology, we can grow quite substantially on the current platform that we have. And that's what we intend to do.

Sumit Dhanda - ISI Group Inc., Research Division

Sumit Dhanda from ISI. I had a question on the 40, Jon, on your second year expectations for 28 nanometers versus prior generations. And I guess when I eyeballed that chart, it seemed like your expectation for next year for 28 nanometers is about 25%, 30% higher than what it was for 65 at the same time. And I guess where I'm going with this is, that node got introduced maybe 6-ish years ago and 25%, 30% higher market size for the leading-edge node, while Knight [ph] doesn't seem to support this whole programmable imperative argument because the CAGR there is only 5% a year, if you do the math, right? I guess what are we missing in that -- or what am I missing in that analysis?

Jon A. Olson

Well, you've made some extrapolations mathematically with that analysis. I think what I was trying to do is show the starting point and how fast the traction was happening. So we're starting to race, and we're running really, really rapidly and gaining on things very, very rapidly. 65-nanometer had a very long life, and it has -- and it was a very broad set of applications. And it had different points in its history when it accelerated and declined. In fact, it's been the primary base station driver for us in terms of products. And we hit the time period when the base station, radio cards really expanded with FPGAs, and we benefited from that later in its life. So I don't think you can look at a slower -- 25% bigger, so therefore, that's only 5% CAGR of possibly -- as some of these other applications kick in. Remember, Zynq is starting slow relative to its revenue potential, probably in a very small percentage of our revenue right now, but we do believe it will ultimately end up in 20% of our total 28-nanometer revenue. And that's really a function of the fact that these application focuses that we picked happen to be slow gestation periods, but when it gets going, it's going to grow very, very rapidly. So I think the broader portfolio is going to play into a different dynamic than just doing that particular arithmetic. That make sense?

Sumit Dhanda - ISI Group Inc., Research Division

Yes, sure. Maybe just a quick follow-up, not to belabor the point, but at 65, you just have the high-end product. You didn't even have a low-end offering. Here, you're first to market extensively across the board. So I guess why not a more aggressive projection in terms of what that revenue number could look like next year?

Jon A. Olson

Well, again, it's not lost on me. All the questions are asked about -- they don't believe what I've said, let alone now, suggesting that we should have 20% growth. So you put me in a little bit of an uncomfortable position because if I say, "Yes, you're right," then these guys are going to say, "It's even crazier than I thought it was before." [indiscernible] on the webcast. So we are very bullish about where we are with 28-nanometer, and there's a lot ahead of us relative to additional wins, all the shouting and crying in design wins aren't done yet. We still have a very strong design year -- design win year ahead of us in FY '14. Let us come back here in a year and have some true points, and we'll come back. And hopefully, things will even be better.

Parker Paulin - Wells Fargo Securities, LLC, Research Division

Parker Paulin, Wells Fargo Securities. As a bit of a high-level question, assuming no software issues this time around, if we think about design teams having a bit of a stickiness effect and is leading to an incumbency advantage, how do we think about you guys mitigating this effect over your competitor who seems to have a larger market share at 40? And a follow-up.

Moshe N. Gavrielov

Incumbency is the ultimate excuse to use when you've run out of anything else, right? Because if you have a better product, you've got better product. If you're down to talking incumbency, it really means you have nothing left to sell. We had the incumbency of 65-nanometer. And the fact is that by being late, at 40, it shifted to the competition. What we have done to enable and facilitate that shift back is come up with a design suite, which was designed from scratch, which has absolutely across-the-board superior characteristics to anything we have had and, more importantly, anything the competition had. So all of that will facilitate this fast move, right? And with the best silicon and the best software, it will accelerate. So it's a valid question, but I think we have all the tools in place to shift over customers who may not have been our customers with 40. In all likelihood, several of those were our customers at 65, and they will be our customers again at 28 going forward. So, again, to repeat the statement, I'm supremely confident in our ability to transition our customers over, and it's part of, I believe, the demo we have in the back. We will show how good our software is and how competitive it is. So we have all the tools to address that.

Parker Paulin - Wells Fargo Securities, LLC, Research Division

And then as a quick follow-on, what portion of 28-nanometer sales so far have been ASIC cumulation?

Moshe N. Gavrielov

In terms of revenue? We don't break that out for the fastest-growing parts of our business. Currently, it's Kintex, and that's not ASIC cumulation. We expect that to be the fastest-growing part of the business at least for the next year, followed by Virtex in its entirety.

Jon A. Olson

Sure. And so we're going to take one more after this.

William Stein - SunTrust Robinson Humphrey, Inc., Research Division

It's Will Stein from SunTrust. First, I'd like to talk about the R&D line a little bit. You've highlighted this big investment you've made in Vivado. Presumably, that investment, at least to some degree, rolls off in the coming years. So can you talk about how fungible those resources are and where the focus shift and maybe talk a little bit about the investment cycle in development tools versus other areas of the business? And I do have a follow-up.

Jon A. Olson

The painting is never done. So I'll turn it over to Victor. It doesn't -- there's not really a roll-off there.

Victor Peng

Yes, I mean, first of all, we continue to add capability and features. We were doing that with ISE for over a decade, and we'll continue to do that with Vivado, right? And I had mentioned one thing that, again, we have differentiated capability, high-level sensitive, and that's something that we're going to certainly build upon because this is a lever in motion that goes across the entire Silicon suite, right? By the way, the other aspect of it is that we agreed there is more stickiness in terms of the software. We also need to invest in true software development, right, like in operating systems and so on. You saw our different sets of logos in terms of the acquisitions we did over the past year. A lot of them was actually a small Linux company, right? So we are going to continue in investment software. That's absolutely strategic and critical for us. We'll continue to add in different places, but I wouldn't sort of say I don't care if they're done. We can kind of sort of just stand them and sort of move them around someplace else. Nonetheless, I think we've done it again in a very cost-effective way, as Jon said, through having a very global footprint. The largest design center I have outside of headquarters in the Valley here is in Hyderabad, India. So we did a lot. I just want to make sure we still have the talent. And if we keep doing these innovations, we'll do it really cost-effectively.

Jon A. Olson

So maybe another perspective on that is that we didn't do it all in 1 year [indiscernible]. It was spread over multiple times in multiple years. We also took a core team to start the innovation and started to [indiscernible] people away from the existing software tool over time to make it bigger, so draining 1 swamp, even though we did spend more total dollars doing it than we had in software and previous. So it has been done very, I think, financially responsibly to make sure that we don't end up with this, oh yes, way too many people doing software now and we have to dream up new things. It's not that at all. We're really working on the things our customers need to make the tool more effective and advance the tool.

William Stein - SunTrust Robinson Humphrey, Inc., Research Division

All right, that's helpful. And then the follow-up is about your military and aerospace exposure. Can you remind us how big that is? And not trying to make this too short-term, but there is this sequester that's affecting spend there. So maybe putting that aside and just thinking longer-term, is this a relative drag to the 8% to 12% growth target for the overall business? Or is there something that's going to provide outsized growth in that market?

Jon A. Olson

So about 15% of our total revenue is aerospace and defense. Of that 15%, about 2/3 is, I would say, classified as military, and most of that is U.S. Military. We do have some in Europe. I don't know if the sequester has anything to do with impact of what gets spent in Europe or not. But a lot of what's going on here -- first off, it's a little early to tell exactly what the impact is going to be. But there's been a lot of people troop reductions and things -- dollars reduce in the Defense Department as a result of getting out of various conflicts around the world. And the spend on electronics has been impacted to a lesser degree but, nonetheless, less impacted. And if things do slow down in certain areas, then that usually means they're going to have to redo other things in other areas to keep up. It's a slowdown -- example, a slowdown of F-35, where we have a big presence, they're going to have to do some stuff to extend the life of F-22 and whatever. Oh by the way, we're in that, too. And FPGAs are perfect for that. So on the whole, we don't think there's going to be a significant impact in this 3-year time frame that would say, "Oh that's going to impact the 8% to 12%." There could be some curvations up and down along the way.

Anil K. Doradla - William Blair & Company L.L.C., Research Division

Anil Doradla from William Blair. Moshe, can you dig a little bit deeper into your comment about the 80% design wins on the radio platforms? Is that tied to any particular technology or any geography? And going forward, how do you envision a base station in terms of content breakdown? I mean, you guys have been in 30s, you incorporate some DSPs. So how does the architecture look 5 years from now when we look at these base stations?

Moshe N. Gavrielov

Sure. It was Krishna's comment, so I'll let Krishna answer.

Krishna Rangasayee

So at 28-nanometer, as we look at the radio platform, so with the past 1.5 years, we purchased data in almost every key radio opportunities out there in the market. And Kintex was specifically designed to really focus on the wireless market. That's the first product that they got out. And across all the opportunities that we have competed with, we believe we have about 80% design win in the 28-nanometer node of all the radio platforms available. So Kintex is really, and as you mentioned, an ingredient mix of 30 [ph] technologies, DSP technology, logic technology, combine this with IP, for the right cost, the right par, there is not a whole lot of competition to this particular product here. They're extending that with an SoC version of it, which is the Zynq version, which is also seeing a lot of market traction in radio platforms. So we are quite bullish about our prospect in becoming, long-term, the #1 radio supplier in the world today. Just take a step back to your second question, which is really where do we see base station architectures. Well, on a very high level, there's the radio, there's the base plan, there's the backhaul and then there's the [indiscernible] element. So we've been the de facto connectivity element for a long time. We are now becoming the #1 supplier of radio solutions. The other key area of growth for us is the backhaul space. There's both the modem technology, combined with a packet processing technology. There is not a whole lot of vendors that can offer the value proposition that we can offer today in the backhaul. Of the base plan, it's a very customer-centric and ASIC-centric also, heavily DSP-oriented. We intend to be a core process of [indiscernible] key customers. And we continue to monitor the space, but we are comfortable in the position that we have in the market today with that area. From a base station perspective, if we were to take a step back 3 years from now, we will be the #1 radio supplier [indiscernible] leader and we do think that we are going to be one of the leading suppliers of backhaul solution [indiscernible]. So that architecture solution remains the same, but our footprint and what we traditionally use to participate to where we are today, there's a very big difference.

Anil K. Doradla - William Blair & Company L.L.C., Research Division

[indiscernible].

Krishna Rangasayee

I believe that we have somewhere around close to 20% content around the base station, and we believe that, that will become 35% to 38%.

Jon A. Olson

Okay. Thank you very much for your interest in coming to our analyst today -- Analyst Day. I encourage all of you to enjoy some of the refreshments we have in the room and talk to some of our subject matter experts around the end market areas that we have. We also have a few demos. Make sure you look at -- watch the train. We have a train, a real, real train out there for you to look at. Anyway, so we do have some great demos for you, and we'll all be mingling around, the executive team as well, for you to corner us and ask us a few more questions. So thanks very much.

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