For those of you who have been following my - and the swarm of others' - writings about Intel's (INTC) 4th generation Core processor (codenamed "Haswell), then you will know that the big design focus was on dramatically improving performance/watt over "Ivy Bridge" designs. In high end notebooks and desktops, performance went up modestly in legacy code (~10%) while power consumption saw a nice decline, particularly in idle. But Intel's real challenge is to try to bring PC-like performance to much, much lower power consumption levels. With "Haswell", Intel has very aggressively focused on power and has, in my view "succeeded" in this attempt, but I think that the 14nm process node, coupled with a move of the platform controller hub to leading edge, will be needed to really make this venture shine.
Intel's Ultrabook Haswell: 22nm CPU, 32nm PCH
As I have mentioned in previous articles, Intel's "Haswell" for Ultrabooks is a single-package product, but comes with two chips actually on the package: the CPU/graphics/etc. and then the platform controller hub ("PCH") which includes the controllers for USB, Serial ATA, and PCIe. While the "15W" TDP includes both dies on the same package (which is much better than thr 17W TDP of "Ivy Bridge" that also included an extra 3W from the off-package PCH), I think that there is still some real room for moving total chip power consumption down by actually building the PCH on-die, at the leading edge process node.
For instance, while "Ivy Bridge" had a 22nm processor/graphics with a 65nm PCH off-die, Intel moved the PCH to 32nm (two generation shrink) and put it on package, which both lowers the complexity/size of the motherboard, and at the same time lowers power consumption as the link between CPU and PCH is less complex.
Now, compare this to the upcoming Atom Z3770 ("Bay Trail-T") for tablets, which is a full 22nm single-chip solution that features 2W SDP (which implies a ~3W max TDP). Everything is on one die, and it is all built on Intel's 22nm P1271 process (which is a tweaked version of its higher performance P 1270 CPU process for lower power + analog), which means that the power and area footprint is even lower. This is - I believe - the next step for the Ultrabook/convertible focused higher end "Haswell" chips to both reduce power consumption and to bring costs down.
We've Seen This Before
I expect that the first "true" SoC at the high end will come with Intel's next "tock" called "Skylake" set for launch in 1H 2015. So at that point I'm expecting a 14nm-optimized CPU/GPU/etc. complex built on the same die and process as a 14nm PCH. Not only does that do wonders for idle power (since the current PCH is on 32nm and does not yet utilize the very low leakage FinFETs), but it will lower active power and at the same time lower the amount of total die space used since everything will be on the leading edge.
So, what about the upcoming 14nm "tick" known as "Broadwell"? Well, I think that Intel will - for time to market and complexity reasons - stick with a two-die-on-one-package solution with Broadwell. The question, however, is whether the PCH gets a shrink to 22nm or if it stays on 32nm. My guess is that since Intel has been aggressively taking older generation (pre-22nm) capacity off-line and will have plenty of 22nm capacity remaining even though 14nm begins its ramp in Q4 2013, that Intel will again shrink the PCH to 22nm. This means that active power for the PCH is likely to decline again (lowering max TDP of the solution), but the real news is that since the 22nm process is a FinFET based one (rather than planar), there will be significant benefits on the idle power side of things from a platform perspective. This should enable another dramatic improvement in battery life, although likely not as dramatic as the movement from "Ivy Bridge" to "Haswell" as a lot of the reduction really is due to aggressive power state/gating optimizations on a micro-architectural level rather than from a simple die shrink.
Now, we've actually seen this before with Intel's integrated graphics. pre-Westmere (2010 "Core"), Intel kept GPU and PCH off-die. Then with Westmere, Intel kept the PCH off-die while bringing the graphics on package (built on the 45nm node while the CPU was on 32nm). Then, with "Sandy Bridge" graphics came on-die and was on the leading edge node. Now we are seeing the same thing with the PCH for Ultrabooks: first, the PCH is off-die, off-package, now with Haswell it is on-package, but off-die, and the next generation should be on-die. I would really like to see this in "Broadwell", but given how this is fundamental change (well beyond the scope of a "tick"), I suspect that I won't get my wish.
Keeping The Older Fabs Utilized?
Now, there is a concern here that I briefly touched upon in a previous piece - utilization of older generation capacity. Intel has managed to squeeze double-duty out of its previous generation manufacturing capacity by using it to build these PCH chips to accompany its CPUs. Now, my thesis that Intel will integrate the PCH with the rest of the SoC in the "Skylake" generation certainly makes sense from a mobility/highly integrated point of view, but it may not make sense for applications such as high end workstations, as the validation for these parts is already incredibly difficult, and adding in the rest of the (usually much beefier/sophisticated interfaces) will only lead to unnecessary complexity and time to market concerns.
So, what I think will happen is this: the high end desktop/high end Xeon parts for data centers, workstations, and other performance sensitive applications will stick to using a separate PCH; in fact, today's high end desktop parts actually use server/workstation chipsets. But for any SKUs that are highly integrated - for all-in-ones, Ultrabooks, and even higher power notebooks - Intel will very likely pack everything onto the same die. In the consumer space, everything needs to consume less power and have as small a footprint as possible, but in the professional/enthusiast spaces, the priorities are much more heavily weighted towards the "performance" part of that ratio.
This, of course, means that Intel will need to find a way to keep older manufacturing plants utilized or will have to be able to move these older plants and equipment to next generation technologies more quickly while still getting the full value of the costs sunk on these factories. My view is that Intel could do this by flooding the market with lower cost mobile SoCs built on n-1 and even n-2 generation, coupled with moving enthusaist desktop parts to the "high end" platform by building more SKUs that will be on n-1 process technology (with separate chipsets built on n-2 technology). Let me explain.
Two Desktop Platforms
So, Intel has two lines of desktop platforms: the "mainstream" and "enthusiast". The "mainstream" desktop platform is usually on the highest end process technology, with the latest processor core, and is usually an upscaling of the firm's mobile parts. This is why you'll see a lot of the enthusiast review sites dismissing "Haswell" - these customers don't care that much about power consumption and instead care about raw performance within a reasonable power envelope. The high end platform supports more cores, more memory channels/capacity, more PCI-Express slots, and is essentially a cut down version of the "Xeon" workstation platforms.
My guess is that traditional, non-soldered down desktop parts, Intel will simply try to move everybody over to this platform by introducing a wider variety of SKUs at various price points and core counts, and will focus its "mainstream" platform solely on the integrated all-in-one, notebook, and ultrabook platforms. Since this platform requires a separate PCH, and are based on longer-to-validate server-oriented chip designs, it is usually a generation or so behind the "mainstream" which means that when the "mainstream" parts transition to a new process node, the "high end desktop" stays on the previous node.
The problem with this, though, is that the volumes aren't all that huge thanks to the "niche" nature of the platform. Expanding the range of parts on this platform will probably placate the enthusiasts and expand the volumes a bit, all while having R&D efforts subsidized by the workstation/server parts. Intel will still probably find itself needing to drive higher volume/lower cost budget SoCs on older generation processes to really keep volumes high in light of the PCH getting integrated onto the higher end Ultrabook SoCs, but this could certainly help.
Intel Needs To Transition To 14nm Soon
Haswell in Ultrabooks managed to bring about a massive battery life increase while keeping the core on the same 22nm process node as Ivy Bridge, but to really advance from this first effort, 14nm "Broadwell" based Ultrabook chips can't come fast enough. When 14nm hits, Intel will be able to put more onto the chip to drive performance without increasing the die size, while at the same time will be able to drive down performance since the transistors themselves will consume much lower power.
From the recent benchmarks of Intel's "Haswell" for Ultrabooks, it seems that performance per watt has gone through the roof, since normalized for battery capacity (although the highly integrated platform is what affords the new Haswell machines a larger battery without changing size/weight of the laptop), battery life has seen a ~50% increase in light/moderate workloads. But raw/absolute performance largely stagnated relative to "Ivy Bridge". This is where we are starting to see the limits of the 22nm process, and it is clear that we need the new process node to see a big performance jump at these power levels. I suspect that "Haswell" was the big "reset button" for Ultrabooks on the power consumption/battery life side, but it will take Broadwell and its successors to drive further performance in this new power envelope.
Intel's "Haswell" is the first "true" Ultrabook oriented chip, and I believe that with "Haswell" based Ultrabooks, consumers will finally see the value proposition of the Ultrabook platform. Thanks to much lower platform power, strong performance, and reduced hardware footprint, OEMs can now have room for better/higher power displays and thinner/lighter form factors (even fanless). While I still maintain that Intel's "Atom" is really going to be the star that drives significant volume growth for the company, "Haswell" should drive desirable form factors at the high end of the compute continuum, which is becoming less "PC" and much more "converged computing device". But I think that the 14nm generation will offer a dramatic improvement over "Haswell" in both power and performance, and that we are nowhere near the "end" of this story. If Intel can keep its manufacturing lead, then it should be untouchable at high performance levels while at the same time offering excellent battery life/power consumption in tablet-like form factors even with its high end parts.