Applied Materials, Inc. (NASDAQ:AMAT)
Deutsche Bank Technology Conference
September 10, 2013 07:50 p.m. ET
Steve Ghanayem - Group Vice President and General Manager, Transistor and Metallization Products Group
Okay. Good afternoon everyone. Thanks for joining. We have the next presentation today from Applied Materials, one of the leading semiconductor equipment companies. And with us today we have Steve Ghanayem, who is the Group Vice President and Head of Transistors and Metallization Business Unit. Steve will give a brief presentation and then we’ll open up for Q&A. Steve, thank you.
Okay. Good afternoon, everyone. As he said my name is Steve Ghanayem. I run the Transistor and Metallization group at Applied Materials. Transistor portion consists of products like implants, RTP, FET gate; and the metallization portion is all the metals, PVD, CVD ALD, front end, back end, kind of covers everything in that space.
I have been with the company about 24 years and run many different products, so fairly familiar with this area. Before I go on, what I really -- we’re going to talk about building momentum for profitable growth, but really the focus of my talk is really going to be around these things, right, smartphones, mobility, whatever you want to call it. But the one thing that people underestimate is this is a very powerful computer, it’s about a gigahertz of capability. A few years ago, when you get a laptop, notebook, it’d be about gigahertz. So people think of it more for the features, but it’s also very powerful computer.
And the reason I mention that is because what's at the heart of that powerful computer is a transistor. And most of my talk will really be about the transistor, the transistor roadmap, how it’s evolving and how it’s going to change in the future, and how traditional scaling as we know it has kind of stopped and it’s really about material scaling going forward, and I’ll show you a lot of examples about that.
And it’s really about the growth opportunities that Applied Materials has in this space as we move forward. So first the Safe Harbor statement you guys know this better than I do.
Looking at mobility, the shipments on the left versus year, and if you look at the green, the dark green is smartphones, like the iPhone et cetera, the lighter green is kind of emerging market smartphones and then tablets on the top. And a couple of important and interesting points, one is if you at just the dark green and the very light green at the top, the tablets and the smartphones in 2012 there were more shipments than PCs.
And so if you look only in a couple more years, if you look at 2014 and you combine tablets in the dark green here it will be 2x what the shipments are for PCs. So there is no question that the mobility era is here, it’s strong, since 2010 the wafer fab equipment market has been in a big upturn relative to the previous few years. And so this is what’s deriving pretty much all of our activity in terms of tool development day in and day out.
And if you look at what it does for the business, what we’ve got here is on the -- your left, the wafer fab equipment market from 2006 to 2008 it’s an average of those three years, it’s about $30 billion. And if look going forward we see that average over a three year period growing, it’s growing now. If you look at 2010 to ’12 it’s up about 10% or so and then it’s growing in the future beyond that.
But what’s more interesting is if you look at the device mix. If you look at 2006 to 2008 data more than half of the business was DRAM and Flash it was more than 50% memory, a very small portion was foundry and then a chunk of logic. And if you look at the last few years that is completely inverted, foundry plus logic combined is more than 50% of the business in the 2010 to ’12 timeframe and going forward foundry gets even bigger.
So this mobility trend is clearly represented in what’s happening with the foundry business and its growing dominance of wafer fab equipment purchases and this bodes very well for Applied. Applied’s position in foundry is very strong in general, it's stronger than the position overall as a company in memory. And so this mix is very favorable for Applied and this trend seems to be continuing.
Now when I look at mobility in the context of the past into 90s, and 2000 it was all about performance and it was speed the gigahertz rate getting the fastest computing speed possible that’s what everybody cared about and it was performance at any cost. It didn't matter you plugged in you can burn as much power as you wanted in fact when we travel we could take extra batteries in our bag so that you could last the entire trip to Japan or to Asia.
So performance at any cost was the model. And that’s changed significantly now because it’s not about performance at any cost but it’s about high performance because as I’ve said these things are powerful computers. It’s not like they’re not capable. They are very powerful in order to have all the features that you get but at the same time you need a real power and so you need to actively manage the battery usage which is essentially the leakage, the transistor leakage.
And so how is this possible, the only way this whole mobility trend can happen is because of advanced transistors. And that’s really where the focus of this is going to be, it’s about advanced transistors and how they’ve changed and how they have essentially enabled mobility. And really mobility is really all about the transistor that’s really the one message you should walk away from.
But before I go on I wanted to give a couple of basic things in case it's unclear because there is a lot of terminologies thrown around. So here is the [cutting] of a transistor that's on and here you see the source train gate and it’s in the on stage and the one thing that makes it simple is the transistor's is really nothing but a switch. It’s a very complicated, very tiny switch nothing more than that, no different than a light switch in fact because as you switch the light on you send a voltage through the filament, it turns the light on.
In this case it’s identical. You put a voltage on the gate that turns on the transistor and you get a current flow open source to drain. And that current flow it’s essentially the performance part of the transistor. Once you have this term Ion, this is called the drive current. And so the performance and the speed is determined mostly by this drive current or the Ion component.
When the transistor is off then this current I ideally would be zero but it’s never completely off. And so the transistor is more or like kind of a dimmer, when you’re at home when you turn your dimmer off and you think it’s off but it's really glowing a little bit. These things are always on just a little bit.
And that’s really what this life of battery power is all about, increasing the battery life, it’s all about controlling this Ioff element it’s when you turn it up can it really be as off as possible which means utilize the Ioff as low as possible and Ioff is really what people call leakage current. Leakage is when you are flowing current when you don’t want it to happen.
So this kind of sets the stage for some of the discussion going forward. Now in the past a transistor really didn’t change much. For 30 years it was essentially the same material system, the Gate Electrode as Poly Silicon, the gate dielectric called SIO2 and for the majority of that 30 years those two films were put down with furnaces.
And as you know Applied Material doesn’t compete in the furnace space so you see that in the past with this material system in the front end space there was very little opportunity for Applied. And there was only a couple of steps and steps that were not done in our equipment so there was not much opportunities, that was the past.
Looking forward I call this a transistor revolution and it really is a revolution in the way a transistor is made and the way it's going to be made in the future. And these are really big changes and it started with selective epi, many of you’ve heard of PMOS epi or silicon germanium, that all got fanned out in to the foundry space at about 45 nanometer, that’s when it was kind of universally adopted.
And so once that epi, once it goes into production at 45 across the board it’s there for good. You see there is a line coming out all the way down to 10 nanometer and beyond and so there is really two things I want you to remember about this slide. And that is that every technology that first gets implemented will continue to be used in the next nodes because once you enable that kind of that performance gain with epi you can’t go back and take it out in the next node because there's no way to make up that difference.
A process like epi might add 15% to 20% Ion improvement and everyone knows customers are trying to get more and more performance out of the transistor. So if they pull it out there is no way to make it up, so once it's in, it's in, that’s the first thing as a technology. And then the second thing is that these technologies that I am going to talk about whether it be epi or high K metal gate or the metal gate in the high k metal gate scheme they are very sensitive technologies because they are what make the transistor function.
And in the customer space once they’ve designed the process flow and they’ve got a working transition that’s meeting their requirements they don’t want to mess with it, they don’t change it at all. And so if you are the incumbent tool supplier you are in the space the likelihood of you getting displaced in another node is extremely low because customers just don’t want to deal with it.
Once they’ve got the something that works and it’s manufacturable and they are happy with it they are pretty much in. So two things, the technology sticks and the incumbency helps you stick. So it’s very good for those suppliers that are in these spaces and applied material is very strong in this front end space.
The next node 30 nanometer to 28 nanometer many of you know that was the node that the foundries adopted high k metal gate. And it started with two different flavors, one flavor was what we call gate first. And in this case this is meant to be a cartoon of a gate-first scheme, we call this the first general high k metal gate. And then at 20 nanometer there was what you call replacement gate or gate lapse is another terminology people use, And that was cut in, that’s being cut in today at 20 nanometer.
Now the important thing to remember is that at 28 nanometer there was gate-first and gate-last, it depended on the customer they were both adopted in to manufacturing. But at 20 nanometer pretty much all customers have shifted to gate-last. So essentially the entire customer base is using gate-last or POLY/SiON gate at 20 nanometer.
The other thing that’s important at 20 nanometer is NMOS epi. So I mentioned here at PMOS epi and there is a second epi step called NMOS epi which is essentially for the NMOS device being implemented at 20 nanometer.
Now most of you know about epis because of what happened way back in 45 nanometer, this PMOS silicon germanium got implemented, many people really didn’t know anything about epi and so several years later until the business started to grow. But think about all of the business for EPI and selected EPI for the last few nodes as all being just one layer and that’s this PMOS epi, this is a second layer.
So it adds a significant amount of revenue and market share for Applied Materials going forward because it’s a very slow step. And many people probably have heard this that the epi process, as you move from technology node to technology node, it tends to slow down because it’s much hard to make that epi meet all the technical requirements. So the film, actually deposition rate goes down, thermal budget goes down and it tends to be a much bigger market.
So at 20 nanometer, we've got basically all of replacement gates where Applied has very high market share in the Endura platform and you’ve got a second epi layer an NMOS epi going into production.
And then finally on the roadmap you see FinFET. And the FinFET transistor at around the 16, 14 nanometer, depending on the terminology that people use, and then even more new materials. A lot of people toady ask me in many of the meetings, so what happens after FinFET, is there any more scaling or what happens. I think the important thing I said at the very beginning was that this is not about geometric scaling anymore.
If you think about this, this is all material scaling, started with the implementation of epi, significant and drastic material change in High-k metal gate and then again at the replacement gate, and then going into FinFET and then next generation FinFET, there can be more materials like germanium or other materials that will be used to get more speed out of the transistor.
So this is the roadmap going forward and this is really the material scaling roadmap. And that’s why you hear a lot of talk out of Applied Materials about precision materials engineering and material scaling, because we do see it, it’s real. These transistors are undergoing these material changes now.
And the other thing to remember is these changes are massive changes, I mean it's just a prop with the bunch of little cartoons on it. But I said for 30 years, there was no change in the material system on the transistor. And then in the matter of few years, you see all of these drastic changes. These are massive changes. I think of it on the order of when the industry went from aluminum backend to copper backend, that was a huge inflection and huge change in the industry. This is on that scale. It’s a big deal.
And finally we’re here today. 20 nanometers has not ramped yet. And so a lot of people think about this and ask questions around that FinFET is here but in realty 20 nanometer is not even ramped yet. And so for Applied Materials, where we have great strength in replacement metal gate, we have great strength in Epi, we’re going to see the benefits of that implementation as 20 nanometer ramps in the coming years and as well as going into 16 nanometer and beyond.
And then this shows just the transistor in general. And I want to show that we’re number one in a number of technologies that are required to make a transistor: Number one in CMP, number one in implant, number one in PVD, number one in plasma CVD, number one in epi. Collectively, with these technologies we have greater than 70% market share. In three of the technologies: Implant, epi and PVD we're greater than 75% market share.
So, this transistor space is a great strength for Applied Materials and these changes are working in our favor going forward. And I wanted to talk for a minute about two benchmark products that are used in making the transistor. And I talked Epi and I talked about High-k metal gate.
So for epi, slice of Epi is done on a Centura platform. And we’ve got over 800 systems worldwide, greater than 80% share, number one position in epi, great strength. And actually Epi is the first product Applied Materials designed or built a product for some 45 years ago. So there is a huge amount of institutional knowledge in the company in Epi.
Endura is arguably one of the most successful platforms in the entire wafer fab equipment industry, over 5,000 systems shipped, greater than 75% market share for over 20 years running. And these two are workhorses of the transistor today and great strengths and assets for Applied Materials.
So, first speed, so I talked about the fact that you need speed, you need performance out of these, the mobile devices but you also need battery, good battery life. So on the speed component of it, I want to talk about epi because epi is really designed to give speed. And first, just a second, I won’t take too much time on this, what is epi; it’s a process by which you grow atom-by-atom on the silicon substrate.
So for example here these are meant to be silicon atoms and when you grow an epi layer you grow in perfect coordination with the substrate so that you retain the crystal structure, the underlying crystal structure. And to do that it’s a very slow process, it has to be defect free, so it has to be very carefully grown and you have to have a very clean pristine surface that you are growing on.
So it’s a very complex process, it’s very slow process. And when you hear about epi being used silicon germanium PMOS epi, silicon germanium means that you are sticking a bigger atom, a germanium atom in this place of the silicon in this example. And that leads to strain and basically put stress on neighboring material.
So if you had a bunch of silicon germanium here and a bunch of silicon germanium here and you had pure silicon in between because the atoms are bigger it's expanding the volume, it's squeezing the silicon in between and that squeezing of silicon creates an increase in mobility of the electronics in greater speed. That’s how this works, that’s how this whole drain engineering technology works.
I have this example and this shows you that with a cross section and animation of a crystal these are meant to be silicon these are Ion, it’s current flowing. This is your base line case of a transistor. Then you come and you etch out the silicon strain and you fill it up with silicon germanium epi. And as it fills they can [strain] the center this shows you that you are stressing that channel area and as a result of that stress you get more current flowing, that’s essentially what silicon germanium epi is going.
So why is it so enabling, because the capability you get out of the strain engineering is really massive compared to what traditional node over node scaling does. Traditional and customers wanted to get some 15% to 20% improvement from one node to the next. You can get that improvement solely from epi alone. In fact when epi was first introduced there was some data that showed up to 60% improvement of this Ion on state current.
When this got put in to production the very first time, in real production it was about 25% improvement, that’s a massive improvement, that’s more than one node of normal development and that means more than one node of improvement compared to all of the things that they would do to improve the transistor. And this is one step they could see in one shop. That’s why still valuable and everybody put it in to production.
The other thing about epi is that you need a very clean interface. And one of the things that we did is we took a product we called Siconi which is available on our Endura and other product lines and we were able to integrate it on the Centura epi tool and basically clean the interface before we do the epi deposition.
That’s something that only you can do in Applied where you have all these multiple technologies that you can reach out and grab and bring in and enable the capability to basically add that second epi layer in reality that second epi layer could not be added at the thermal budget that exists today, and having a pre-clean integrating on our tool under vacuum enabled that possibility. I think we are running short on time so I am going to speed up a little.
This just shows the number of epi steps, so at 32, 28 nanometer there are roughly three steps of epi and it’s growing as we go out. And in the 10 nanometer we see that the number of steps can grow substantially due to these new materials that people may put into production like germanium or gallium arsenide or indium-gallium-arsenide three size materials. Beyond 10 nanometers these materials are going to be part of the transistor.
And this just represents what performance boost you can get from these kinds of materials and that’s why people need to do the material scaling because there is no way you’re going to get this performance boost based on geometrical or with the graphic scaling, what this shows is that this is an electron mobility if silicon is here, if the silicon channel is here we’re going to get 2.5 times the speed of that electron with germanium, 6x with gallium arsenide. So these are the materials people are looking at for that next beyond 10 nanometer epi channel.
Now for the low power, so epi is all about speed and now for power control it’s all about the high-k/metal gate stack. And with that I’ll talk briefly about what people have done and basically they’ve gone from this Poly SiO2 system to this high-k this is the gate so this high-k and this is all of the metal gate required to work in conjunction with high-k. You connect just the poly and high-k it doesn’t work. You have to put specialized metals on top of the high-k material in order to make the transistor function properly.
And what’s more interesting is it that all of these metals there is multiple layers, there is about five layers of this metal in the gate-last scheme. And what you are trying to do by doing that is reduce this Ioff, this leakage current from where it was with a poly silicon oxide system to a much lower value and in some cases customers got a 10x improvement of leakage or even a 100x improvement in leakage by going to this high-k gate scheme.
This cartoon just shows you the complexity of all the layers that go into this space to make this high-k to make this metal gate-last scheme work. It’s five metal zones and that is instead of one metal zone for gate-first and that's instead of one poly zone for the previous generations, very complex.
These zones are in the order of 10 to 15 Angstroms and you are putting all five of them in the space of a couple of thousand Angstroms. So the interfaces between these zones are critical they need to be done under high vacuum in many cases to preserve the quality of the interface and the quality of the material.
And this just gives an example that with the Endura system because of the high vacuum capability that each zone it starts is actually multiple steps on the Endura tool, there is pre-possessing, there is post processing and it's a very critical to make this thing work day in and day out 365, seven days a week and preserve the integrity of these very thin zones that make the transistor work.
So this is not an easy thing to make work, very complicated but very much within the know-how and the capability of Applied Materials and with the Endura platform as I said we’ve got 5,000 of them in the field, very strong position for Applied Materials.
And then beyond it gets even more complex with the FinFET. With the FinFET you need the same metal-gate scheme, you just need more conformal zones. You still the epi both the PMOS and NMOS epi and there is even more challenges with FinFET around context and other areas that we are working to solve for our customers.
So all of this change in the transistor is leading to opportunities for Applied where we are really bringing solutions to the customers.
And then finally the number of metal-gate steps. Today at 20 nanometer these steps that I showed in that previous slide, but as we go on to the next generation devices there are some customers that want what they call multi-VT devices, that will have different special voltages on different devices on the same chip, which means they need more metal layers.
So we can grow from five anywhere to eight or nine metal layers up per wafer to make this metal gate scheme work and that all would be pretty much on our systems. So finally we are saying that lithographic scaling has kind of stopped and it’s all about material scaling. But also other people are saying the same thing and this is a quote from ARM IBM and [Insight], basically at 28 nanometer 90% of the performance gains came from materials and device architecture innovation. And so we see that as a world going forward that the materials, that Applied Material deposits, etches, pouches these are the things that are going to drive these FinFET and the transistor roadmap going forward.
So key takeaways, one the transition revolution has just begun, a lot of people like to think of it that we are already well down this but as I said 20 nanometer hasn’t even ramped yet. We still have FinFET, we still have beyond FinFET, there is huge opportunity going forward for us and we are in a very good position to capitalize on that opportunity. You know our leadership in metal gate and epi will drive very strong revenue growth for Applied Materials in the next few years as these technologies get ramped.
And finally the new materials part will really drive the transistor performance into the next decade. And with some of these new materials like germanium and the three Si's it’s a complete eco-system change. You can’t use necessarily all the same processes; you can’t grow the same gate dielectric.
So it even opens up an opportunity for Applied in many of the spaces. You got to etch it; you got to polish the stuff you got to grow a new dielectric for the gate dielectric. So it’s really going to open up new opportunities for us in many adjacent processes beyond the deposition of these new materials. So it looks like a very positive future for Applied.
That’s all I have. Thank you. And I’ll take a few questions.
Thanks. Thanks, Steve. Very good presentation. Let me just start off with a few questions and then we can open up. I think you made very interesting point about transistor scaling and how lithography is going to become not as important as transistor material scaling. So how do your customers think about the next couple of nodes and the time it takes to get to those nodes? If we can achieve performance without going to 16 and 10 nanometer, by adopting some of these technologies and why take on the extra complex task of scaling to those nodes?
Well, I’d say that probably there is a drive for even more performance, more features on your phone and more battery life, right? And then so, I think it’s the consumer that’s driving this backwards through the supply chain into these customers. They’re driving their roadmaps in order to meet their customer demand. And I don’t see it changing, because I see everybody wants more capability on their phone.
I particularly don’t like charging my iPhone twice a day. But I don’t see that changing and I see the customers driving us very hard. I mentioned earlier that even today customers are starting to take 10 nanometer tools. So I don’t see this thing slowing or changing, it’s very aggressive going forward.
Okay. And how can you leverage your leadership in transistors to sort of look at some of the other share opportunities at the backend offline, how does, I mean the whole, the value proposition for Applied Materials has changed significantly over the last couple of years as you start promoting the transistor more actively. So how do you see that impacting your business in the backend?
Well, in the backend of line actually for foundry, we’re actually very strong. We’re in a very good position in the backend of line, all of that backend of line, copper barrier/seed et cetera, we’re very strong, Endura PVD is a very strong product for us.
So there is really not a lot of impact I would say from the front end to the backend, but again in foundry, I think we’re doing quite well in the backend.
And as you think about 20 nanometer do you see some of your customers ramping faster or slower, given the challenges that they've overcome at 28 nanometer, do you think that the ramp of 20 nanometer is going to be any different from 28 nanometer?
I think it could be. And what I would look for is at 20 nanometer some customers are going from a gate-first scheme to a gate-last scheme at 20. So they don’t have that. It’s the first time they are doing gate-last. So I think they’re going to have a learning curve in how to make gate-last work.
So for the other customers that went gate-last from the beginning, it will be their second generation on the high-k metal gate. So maybe they’ll have an easier time ramping that kind of capability. That’s one of the things I would look at in terms of the ramp. And then the other big thing that’s changing from 28 to 20, the backend of line pitch is changing. And that backend of line pitch change for the backend metallization is quite a challenge. And so some customers have greater strengths than others in their ability to design a really good interconnect.
So those are the things I would look for in thinking about who can meet the ramp challenge better.
Can you talk broadly about how you’re seeing the foundry market right now, are you seeing any strength or sort of softening at 28 nanometer node particularly and how do you see the transition to 20 nanometer evolve over the next couple of quarters?
So 20 nanometer, I think we’ve said that we see that pretty much ramping next year. And that is very consistent with what we said elsewhere. 28 nanometer is kind of mostly done. We don’t see a whole lot of 28 nanometer, 32 nanometer business. So I think that part is essentially done. And really next year and beyond will be all about 20 nanometer and then the follow on 16 first generation FinFET.
I want to see if there are any questions in the room. May be Steve we can talk about the DRAM in the NAND market, I know you said that more than 50% of your business you guys have very high market share there. DRAM business has picked up over the last couple of quarters how do you see that business trending over the next couple of quarters? And also do you think 3D NAND is going to, the investments are going to happen this year, you’re going to see some slowdown there?
So 3D NAND we definitely see some acceleration, we’ve talked about it that probably early next year we’ll see some ramp in 3D NAND. There has been some public comments from our customers about their activity in 3D NAND; so that we definitely see. So we see a lot of opportunity going from 2D NAND to 3D NAND because we do feel that our position in a couple of areas, key areas like etch and especially in strengthening in that transition as well as I see it strengthening even in the front end area going from 2D NAND to 3D NAND.
So we see that coming next year and that’s positive sign for us.
And then Steve it’s been almost a year now that you’ve got a new management change at least, the announcement happened now but I think Gary has been at Applied for a while now. How do you think the culture is evolving and what are some of the key changes that you are seeing right now which are driving your share.
I think there is few things happening when Gary came on board, he really did start to focus and prioritize the Silicon Systems Group, the wafer fab equipment part of the company. And as the market kind of took off in 2010 that’s been a greater and greater focus of Applied but what was kind of lacking was more investments in this space, operating expense.
And so with Gary coming on board he has really kind of put his money where his mouth is and he is starting to move from other parts of the company into R&D for silicon. And so we do see a greater focus on product development focused on R&D within silicon specifically.
So that’s a very big change, a big positive change for the company. Then there is a lot of his personal focus on areas where we would, where we’ve been traditionally weak in market share. I think he's putting a lot of his personal attention in some of those areas try to help us basically develop the right product and gain product differentiation.
So and I think that will take a little bit of time over the next couple of years we’ll probably see that come to fruition. But there is really a great focus on semiconductor right now.
Okay. Thank you very much for your time, thanks Steve.
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