# Intel's Broxton Die Size Revealed

This is an incredibly simple observation, but I believe that it may be helpful to investors to have an "official" die size for Intel's (NASDAQ:INTC) 2015 14 nanometer high end smartphone and tablet part.

Why Is Die Size Important?

The bottom line is that for a given semiconductor manufacturing technology, die size largely determines cost. In very loose terms (I emphasize that this is "loose" simply because there are other factors that go into the cost of a finished chip product such as packaging and test), the smaller the die, the cheaper it is to build on any given process technology.

Smaller, as long as the product is competitive with products from its peers, is very clearly better. With that in mind, it's time to dig in to figure out just how large Intel's upcoming "Broxton" 2015 smartphone/tablet part will be.

Doing The Math

At Intel's investor meeting, CFO Stacy Smith showed the following slide:

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Now, while the company did not give die-sizes, I actually penned a piece in which I revealed that Bay Trail's die size was roughly 102mm^2. The work to calculate the die size can be found here:

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So, since Stacy Smith assured us that these die sizes were "to scale," whipping out my handy ruler and my Dell Venue 8 Pro, I measure the Bay Trail die shot given in Smith's slide to be 3.6cm * 3.3cm. I measure the Broxton die to be 2.7cm * 2.5cm (obviously there's a bit of rounding error going on here as the ratio of length to width should be constant for both but in this case they are off by 0.01cm).

This implies a "measured" area of 11.88cm^2 for Bay Trail and a "measured" area of 6.75cm^2 for Broxton. Scaling appropriately with the fact that Bay Trail is a 102mm^2 die and we get a die size for Broxton that comes out to about 58mm^2.

The Economics Look Great

Now, to be perfectly fair, Intel already "gave away" the whole point of this exercise with the following slide:

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Broxton, on 14nm and with significantly more graphics and CPU power, will also be 37% cheaper than Bay Trail to make. This implies the massive die size reduction determined above as the actual wafer cost will be going up by about 22% as per Bill Holt's Investor Meeting presentation.

Quite frankly, the economics of Broxton look compelling, and if it has the right performance/integration for the high end (and actually wins designs), then Intel will be able to make a lot of money off of these things.