The Harder Alternative - Managing NAND Capacity In The 3D Age

| About: Intel Corporation (INTC)

Summary

3D NAND is likely to result in extraordinary capacity growth.

Managing this growth, while difficult, will be key to the industry's profitability.

NAND demand must exceed 35% CAGR in order for the industry to prosper.

"One constant among the elements of 1914-as of any era-was the disposition of everyone on all sides not to prepare for the harder alternative, not to act upon what they suspected to be true." - Barbara W. Tuchman, The Guns of August

"Investment in the NAND business will be ROIC dependent." - Ernie Maddock, CFO, Micron

In our last article, we discussed the issue of industry NAND demand growth. Hopefully, we shed some light on the factors that are important in forecasting rates of growth in a market driven by paradigmatic change. Whether or not you found my thesis compelling, however, we can surely agree that industry supply growth will be just as important a factor in the overall business analysis. We will now turn to this topic.

To briefly review, the context of this analysis is the sharply diverging market growth forecasts from Samsung (OTC:SSNLF), Micron (NASDAQ:MU) and Intel (NASDAQ:INTC), with only INTC projecting explosive growth - specifically, a tripling of the 2015 TAM ($31B) over the next three years. Questions arise. The first question is the one the industry would love to have to answer. If Intel is right, can the industry ramp supply rapidly enough to service the demand?

The second question is the "harder alternative." If Intel is wrong and Samsung's projection of 25% growth is right, is the industry inevitably doomed to the Jim Handy-like projection of massive oversupply and subsequent profit crash in 2017-2018? Is there nothing that could be done by industry participants to prop up prices? Central to that question in the absence of demand - can the industry reduce overall capacity? If so, what would the mechanism be for such an action? Would they delay 3D conversion of planar fabs? Would it be better to hold inventory? Failing either of the above, is it feasible for the companies to throttle back or even shutter a fab?

Before we begin our deep dive in a capacity model, let's take a moment to illustrate how important this topic is for the businesses that comprise our NAND oligarchy. Let's assume that final 2015 bit shipments for the industry were 90EB (exabytes) and industry revenues were $31B for NAND and $2B for NOR. Let's assume a Moore's law bit density growth factor of 40% YOY. If we do the math on the average price per GB received by the industry across all the various use cases for NAND, we would get a $.34/GB figure.

Question? What will be the average yearly price decrease factor over the next three years through 2018? If you are Ernie Maddock of Micron, you have the following answer:

(…)But if you look at the net cost reduction, the aggregate rule of thumb is, you'd see somewhere around half of the bit output increase conversely applied to pricing. So as soon as we sort of get through the initial transitions in the ramp, (…) We certainly think that we're going to close [the] gap in a very significant way over the course of the next 18 months or so. - SA Transcripts: Credit Suisse Technology Conference Dec 1, 2015 - emphasis by author

So Ernie likes 20% which is a really sweet deal if your costs are dropping at 40% YOY. Let's ignore the gross margin aspects of this for now and run a scenario on industry revenues given the bit increase forecasts of Samsung (25%) and Micron (35%) against Intel's 3X TAM forecast. Here's the avg. price per bit calculation at a 20% deflator factor:

2015

2016

2017

2018

$0.34

$0.27

$0.22

$0.17

Click to enlarge

And here are the resulting industry revenue projections:

Note Samsung's bit increase forecasts barely move the industry revenue needle. Micron's, on the other hand, show a nice growth to $44B in 2018, and presumably there would be some pretty good profits to go with that revenue since costs are declining at a greater rate than prices.

Let's take this one step further, however. Let's assume a world of oversupply in each of the three years to come. What then is your average price per GB estimate? Maybe it won't drop much if there is only a small amount of oversupply and the industry is selling the bits in highly value-added packages such as data center SSDs. On the other hand, let's say we have an extreme amount of overcapacity? What then is your price deflator estimate? Think it's 40%? Well, that's bad, but you are way too optimistic. What if I now tell you that fully one-third of your die cost is in CapEx? The price floor at which it could be rational to sell your bits then becomes much higher than 40%, doesn't it? Here's the "nuclear winter" scenario at a price deflator of 50%:

Now the above scenario is obviously overly dramatic, assuming as it does that the industry participants would all stay in the market and continue to produce future generations of 3D NAND through this three-year period. By the end of 2017 at the latest, one or more of the Oligarchs would be gone (Toshiba (OTCPK:TOSYY)?) and maybe more (Western Digital (NYSE:WDC), Micron?) or at the very least throttling down capacity. The point that we should all keep in mind, however, is that once a fab is built, the company that built it will run it until the marginal price to be obtained is below the die cost sans D&A. This is the grim logic that faces the industry participants as they contemplate building new capacity.

The "harder alternative" indeed. Let us now turn to a model of capacity growth for the industry. This article will attempt to shed some light on this multi-faceted and often opaque topic. Let's start with what we do know about supply in the industry - at the very least what we think that we know.

First off, we know that the current capacity of the industry is a little over 1 million wafers per month (wpm) distributed as follows as of the end of 2015:

Company

Total KWPM

Planar KWPM

3D KWPM

Intel

40,000

40,000

-

Micron

135,000

120,000

15,000

SK Hynix (OTC:HXSCF)

80,000

80,000

-

Samsung

280,000

220,000

60,000

SanDisk (SNDK)

241,000

241,000

-

Toshiba

283,000

283,000

-

1,079,000

1,004,000

75,000

Click to enlarge

As you can see, outside of Samsung, no supplier has a significant 3D capacity currently, and even for Samsung - in its third generation of V-NAND - the ratio of 3D to planar is only 25%. Micron has an estimated 15k wpm of 3D NAND that was built into the "white space" of its Fab 10 in Singapore with further additions to its capacity having to await the completion of the FAB 10X build-out in early calendar Q3. We also know that the WD/Toshiba partners have plans to begin commercialization of their 3D BiCS product, aiming to exit this year with 3D capacity ranging in the area of 15% of their total wafer supply. Here's SanDisk CFO Judy Bruner as quoted in "Kitguru" on August 1 of last year:

"Our expectation is that the industry will likely exit 2016 in the range of 15 to 20 per cent of wafer capacity on 3D NAND," said Ms. Bruner. "Our expectation is that we will likely be around the low end of that range."

We note that since it shares production facilities with Toshiba, we will also use that number for Toshiba as well. SK Hynix's actual 3D capacity is opaque at this point, but it has announced it will be shipping its 48-layer 256 GB TLC die later this calendar year. Clearly, the transition to 3D is still in its early stages. Most observers of the market are projecting that 3D NAND will be a minority of bits until mid-2018. My model is more optimistic (pessimistic?) than that. It shows the production arc as follows:

I'm going to discuss my assumptions that have driven the outcome shown in the graphic above below, but for now bear with me while I offer some reasons for why this is going to happen.

The central thesis of my argument is that there is an inexorable logic that will drive 3D deployment by the oligarchs. Mirroring the mobilization logic that launched WWI, the industry, now that Samsung is finally crossing the cost threshold, must deploy 3D or abandon the business. Up until now, it could take its own sweet time getting the 3D products to market. Those days are over. It's now deliver or die - it's as simple as that.

While 3D NAND has been (and remains) a controversial technology, the days of doubting it would really ever "work" are over. 3D NAND is a proven technology that solves the problem of planar NAND scalability. We know that because Samsung has proven it. Without 3D NAND, the floating gate planar NAND die is simply unable to continue scaling at a Moore's law (40% YOY) rate. Here's Micron's depiction of 3D NAND's impact on scalability versus planar:

So 3D is necessary to continue productivity increases in NAND. Any supplier that wants to stay in the NAND business has to match Samsung's 3D product density (i.e. cost) with their own product. There is no other alternative that gives them any ability to stay in the business.

So yes, lower cost NAND is vital, but what's not so obvious but just as important is that 3D technology also provides better quality product in several dimensions. Here's endurance:

"Cycling capability" directly relates to the write endurance of the 3D die, which is at least double the write capacity of a planar 16nm die. This is because the cell geometry of the 3D NAND cell has been significantly increased - probably from 16nm to 40nm. Here's Micron's depiction of this phenomenon:

And the benefits of 3D NAND versus planar don't stop there. The relaxation of the cell dimensions does other very good things for the NAND user in the areas of power consumption - up to 50% less - and performance - approaching 2X for writes.

What has all this got to do with supply? Simply this, 3D NAND (from any of the suppliers) is a better product than planar in every dimension important to a customer. Staying with planar is not an option for most use cases and applications. Planar NAND is not going away any time soon, but it will go away. Even if somehow the problem of scalability was solved and a planar die could continue to be cost competitive with a 3D die, the product would not be as good - not as fast, not as reliable, not as power efficient.

So the genie is out of the bottle and there's no stopping. The bulk of the planar NAND wafer capacity will be converted to 3D NAND as soon as the cost crossover threshold is reached. We are by all reports close to that point for Samsung, and Micron claims that it will be at that point and rapidly accelerating through it within months. SanDisk has also claimed that it will have cost superiority with its 48L 256GB BiCS 3D product when it is ready for volume production in 2017, at which point it will be less costly than its industry-leading 15nm planar die.

Keep in mind that when we talk about 3D's superiority, we need to understand that large-scale deployment of the new technology - outside of home-grown SSDs - will come only after exhaustive qualification cycles that fully test the new controller, driver, firmware, and memory subsystem capabilities. If there is one singular weakness of 3D NAND, it is in the metrology arena. As has been often noted, the suppliers can't fully measure all the quirks of the new media, especially in the middle of the die as layer counts increase. Quite simply there are error domains that 3D controller technology is going to have to deal with that can't be fully predicted upfront. You don't know what you don't know. This will impact and delay subsystem design, and that is all important to fully realizing the advantages that 3D offers over planar NAND. Whatever the possible merits of the IM partners' 3D NAND implementation (if any), it seems logical that Samsung's experience with its V-NAND product through three generations gives it a decided advantage in this area.

Whatever the difficulties associated with qualifying the new 3D NAND products, they will be overcome. 3D NAND is a technology whose time has finally come. To recap - it's cheaper, it's higher quality, and it's now (or soon will be) ready for prime time. Let's now build a model of industry bit growth over the next three years, though 2018.

As we do this, we must recognize that we are hip deep in speculative territory regarding several of our assumptions. We don't really know how fast and how far the 3D process can be ramped. Jeongdong Choe of TechInsights predicted at last year's Flash Memory Summit that ramping 3D NAND to 64 and 96 layers was problematic (slide 22). So skepticism abounds, with the single biggest obstacle to scaling being the so-called "vanishing string current" phenomenon.

The problem is that as the length of the string increases (i.e. more layers are added), it becomes harder to reach the top cells because the cells on the way cause disturbance, reducing the overall string current (hence the name "vanishing string current"). AnandTech - July, 2015

Two things we do know: first, Micron thinks 3D NAND can be ramped for the next decade and retain its overall cost per bit advantage; and second, that Intel projects the process to scale at a Moore's law rate (i.e. 40% per year). It's important to note here that Intel has company when it comes to these expansive scalability claims. Samsung is on record projecting "up to one terabit" at "up to 100 layers" by 2017. Since it is currently at 48 layers and 256GBfor its TLC die, one has to question how that is going to happen. On the other hand, Samsung's pace from its first 24-layer 86GB TLC product in 2013 through this year's 48L 256GB product is a 44% year-over-year density increase.

So here is what a Moore's law pace would look like over the last five years of this decade if IM is able maintain it:

Die Density (GB)

2016

2017

2018

2019

2020

384

538

753

1,054

1,476

Click to enlarge

What does this ongoing density increase mean for overall industry capacity? Here's where we have to make another set of assumptions because we really don't have definitive vendor data about wafer shrinkage as a function of process change. We do know that Micron has characterized the initial move from planar to 3D as roughly a 40% wafer decrease because of the increased fab floor space required for the new process. Ongoing we have slides like the following that show a 10-20% decrease as 3D generations advance:

Click to enlarge

For the sake of our analysis, I'm going to assume 40% and 10% for the wafer shrinkage caused by the initial and subsequent process advances for 3D NAND. Let's take the new fab 10X as an example and assume that had Micron purposed it for planar, it would have produced 80 Kwpm. Let's further assume that the Micron cadence for process improvement is yearly and the rate of improvement is 16-32 layers per year through 2020, here is what that looks like in tabular form:

Process Initial Ship Production Ship (80% Yield) Channels Levels Bits Density
32L Q4 2015 Q2 2016 4 32 2 256
32L TLC Q4 2015 Q2 2016 4 32 3 384
48L TLC Q4 2016 Q2 2017 4 48 3 576
64L TLC Q4 2017 Q2 2018 4 64 3 768
96L TLC Q4 2018 Q2 2019 4 96 3 1,152
128 TLC Q4 2019 Q2 2020 4 128 3 1,536
Click to enlarge

And here's how that results in wafer capacity (note the very conservative yield assumptions):

Density GB Die size - mm2 Die/Wafer Year End Yield Wafer Capacity in GB @ Yield
32 165 369 60% 7,085
48 165 369 70% 12,398
72 165 369 90% 23,911
96 165 369 90% 31,882
144 165 369 90% 47,822
192 165 369 90% 63,763
Click to enlarge

Doing the math with a 90% yield results in a Fab 10X capacity growth curve like the following:

Impressive. Despite the dramatic decline in wafer output over the process generations, bit density increases more than compensate for wafer output decline. The result - a rate of overall capacity increase approaching 35% year over year (We should note that this graph is slightly aggressive in that a Moore's law process cadence would result in a slightly less dense die (see above - 1,476Gb vs. the projected 128L TLC 1,536 Gb die) than we have modeled here.

The conclusion I draw from this analysis is that the industry does not need new fabs unless overall demand exceeds 35% a year. Could this analysis be wrong? Intel is adding about 40k wpm to the 3D NAND supply by the end of this year. Could it be right? Absolutely. Let us count the ways.

First, we have no idea if the four different suppliers, each with a different process, can scale them at 40% a year. Other than the track record established by Samsung through three generations, we have only the suppliers' words to go on. What's more, only the IM partners Intel and Micron have even asserted that such a pace is possible throughout a long time frame.

Second, we really have no idea what will constitute a "generation" with 3D NAND. Samsung has gone from 24 to 32 to 48 layers. Micron slide ware shows milestones of 16-32 layers, but does that necessarily mean anything? As we shall see below, there are hints that Gen 2 could be more than a 16-layer increase. What if it's 32 layers? If so, we are looking at a whole new ballgame from a competitive perspective. The other suppliers are even more speculative. SanDisk/Toshiba (soon to be WD/Toshiba) have announced a "Gen 2" 48-layer device and have not positioned Gen 3. SK Hynix's first product is 36 layers and then will transition to 48 by next year.

Third, once the suppliers get past the initial conversion to 3D with the Gen 1/2 process, we don't know what the process density cadence will be. Samsung has released a new generation every year. Will the other suppliers? We really don't know. Beyond that, we don't have good data on how affordable it will be to produce the various generations of 3D. Will CapEx costs overwhelm the density gain? We just don't know. For example, the IM partners may find that it is technically feasible but economically unprofitable to scale their product from 96 to 128 layers. Are there different limits for each supplier's design? Could be, but we're guessing.

Finally, we don't know what the end point will be. Samsung says it can see a path to 100 layers. Micron implies (10 years!) that the layers count could go much higher. Then, there is the packaging angle. Is it possible that these die can be both scaled and stacked in order to aggregate much larger density? Apparently so. Jim Handy in his "Memory Guy" blog quotes a SK Hynix scientist saying that stacking 3D die on top of each other is feasible, giving 3D NAND a useful life that could be "decades" long. It's important to note that stacking does not provide cost scaling. On the other hand, the density scaling that could be achieved with this technique is mind-boggling (Handy goes on to estimate that in Samsung's case, 169 of the die could be stacked on top of each other before the stack would be thicker that the original wafer that the die was created from).

All we can really say at this point is that if we take the IM partners at their word, the move to 3D NAND will result in a torrent of new capacity over the balance of this decade. At this point, it would be imprudent to believe that Intel and Micron have a unique advantage over their competitors, and that is why I modeled similar bit gains by the industry as a whole.

Ernie Maddock and the executive teams at Micron and Intel beg to differ, and we'll return to this discussion of a possible process advantage for IM, but for now, let's return to our analysis of the implications of the industry's move to 3D. Remember now that we're game planning for the failure of demand to match productivity gains. So far, we have concluded the following:

  1. 3D processes are proven and will work (Thank you, Samsung!). There is no reason to expect any supplier to "fail" at 3D.
  2. The 3D product is a better NAND product in every important dimension.
  3. Bit density increases could well be in excess of 30-35% per annum industry wide for at least the balance of this decade and perhaps for well beyond that.
  4. Planar NAND conversions to 3D are difficult in the first generation, but subsequent to that will deliver cost reductions at a rate of approximately 20% a year.

Assuming all of the above is true, once the process ladder starts to be climbed, there is no way to turn back without a supplier leaving themselves exposed to potentially crippling cost disparities with the process leader. The arms race has begun and it will be hard to stop. This means that Jim Handy's projection of a historic glut in NAND capacity leading to massive losses for the suppliers is entirely within the realm of possibility if demand doesn't ramp too well beyond 35% per year.

I have modeled a "minimum" wafer build-out scenario, and here is how it plays out three years hence at the close of 2018:

Industry Wafer Capacity (kwpm) - 2018

Year End Planar

Year End 3D

Year End Total KWPM

Planar Bytes (EB)

3D Bytes (EB)

Intel

0

50,400

50,400

0.0

18.2

Micron

20,000

69,435

89,435

2.5

28.0

SK Hynix

16,000

68,200

84,200

6.1

19.3

Samsung

140,000

90,740

230,740

22.9

25.9

SanDisk

85,000

85,200

170,200

16.9

23.4

Toshiba

95,000

93,200

188,200

20.2

24.7

Total

356,000

457,175

813,175

63

184

Click to enlarge

What you see above is basically the bare minimum new capacity and planar conversion build out by the suppliers. Note the restraint assumed on Samsung's part in only adding approximately 30K wpm of 3D over the course of the three years. Here's what it looks like, year by year:

2016

Company

New 3D

Planar to 3D

Total Add. 3D

Intel

40,000

-

40,000

Micron

50,000

-

50,000

SK Hynix

20,000

-

20,000

Samsung

-

-

-

SanDisk

20,000

-

20,000

Toshiba

20,000

-

20,000

Total Industry

150,000

150,000

Click to enlarge

2016 is pretty straightforward. Everybody except Samsung is building out new capacity because a conversion this extreme is much simpler to do in a green field fab. Intel and Micron are further along than the other suppliers, but everybody is participating in the move to 3D. Even at 25% growth rate, supply does not radically overrun demand in 2016 (see below). Based on that and on the optimism that demand will finally start building in 2017, the industry will want to build out the new fabs that were started in 2016. This results in the following:

2017

Company

New 3D

Planar to 3D

Total Add. 3D

Intel

20,000

-

20,000

Micron

-

40,000

40,000

SK Hynix

40,000

-

40,000

Samsung

30,000

-

30,000

SanDisk

30,000

40,000

70,000

Toshiba

30,000

40,000

70,000

Total Industry

150,000

120,000

270,000

Click to enlarge

By the close of 2017, we have seen the building of one new 3D fab per supplier and the beginning of the planar to 3D conversion. Other than Intel, this outcome marks the minimum that the industry suppliers can do if they decide to commit to 3D NAND. While Intel's Dalian gambit does add approximately 10% more 3D wafers to the minimum expansion scenario, we should remember that Intel and Micron are jointly eliminating 80k wpm 20nm planar NAND capacity over the course of 2016/2017 as they convert Lehi to 3D XPoint. SanDisk/WD and Toshiba are the real wild cards as they play catch up. The main point is however that outside of abandoning 3D and the NAND business altogether, there is no other scenario that is economically feasible.

Let's now consider what this looks like when we play out the demand scenarios. If we further assume that all suppliers have roughly the same 3D density, then here's how this "minimum" scenario looks against demand forecasts:

Capacity vs. Sales

2015

2016

2017

2018

Minimum Build Out Capacity (EB)

90

119

182

247

- Sales @ 25%

90

125

156

195

Sales Under/Overcapacity

5%

-22%

-43%

Click to enlarge

Would it get that bad? Yes, because there is almost nothing the industry can do to turn off the production spigot once the commitment is made to build the 3D NAND node. By late 2017 and definitely in 2018, Jim Handy's apocalyptic vision is a reality and gross margins on NAND are below water, maybe by as much as 30%. Wouldn't sales spike as NAND prices fell precipitously in late 2017 and 2018? Hopefully so, enough at any rate to clear inventory, and only at a horrendous cost.

The point to remember, though, is that the 3D production logic, once the commitment has begun, has no economic stopping point short of the eventual conversion of the planar node to 3D because of the cost and quality advantages of the 3D product. In order to stay competitive, high-cost planar plants must be converted to much lower-cost 3D NAND. The bottom line is simple - the industry has to see demand levels far in excess of 25% YOY because of the immense CapEx investments they are making in the productivity gains from 3D. I've modeled the companies retaining significant planar capacity through 2018, but beyond that it would need to be shuttered or converted to 3D.

Is it possible that there is a silver lining in this scenario for Micron and Intel? Only if we assume that the IM partners have a significant cost advantage that allows them to make at least a small profit at ruinous pricing levels. Could IM have as much as a 25% cost advantage in the late 2017-2018 time frame? If so, it could probably sell at the going rate and still bring a little bit to the bottom line. One aspect of this cost advantage would be a presumptive density advantage and this has an additional benefit - industry bit production is reduced because of lower contributions from non-IM suppliers. Let's model a 20% IM density advantage and see what that means for industry capacity versus demand at the 25%, 35% and 45%/year growth rates through 2018.

The first thing you should notice is that overall industry capacity in the years through 2018 is significantly less than the parity example above - 208 vs. 247 EB. In this scenario, even 25% growth will not overwhelm the industry (even though 2017 is still a problem). At higher sales rates, the industry is well under capacity, especially as the supplier conservatism in building new capacity in 2016 and 2017 plays out in reduced wafer outs in 2018. The other artifact of industry reserve in 2016 and 2017 is that a large amount of planar capacity is still in play.

Playing out this scenario a little further, one consequence of Samsung delaying the Xian expansion until next year is that both Micron and Intel stand to gain big chunks of market share. Using the 20% density/cost advantage metric at a 35% sales rate, we could see Samsung's industry-leading share drop from its current 30% to just south of 20% by 2018 with Micron having the largest share of 3D sales.

Industry Capacity- 2018 (EB)

Planar Bytes (EB)

3D Bytes (EB)

Total EB Capacity

Share Total

Share 3D

Intel

0.0

18.2

18.2

7.4%

9.9%

Micron

2.5

28.0

30.6

12.4%

15.2%

SK Hynix

6.1

19.3

25.4

10.3%

10.5%

Samsung

22.9

25.9

48.8

19.8%

14.1%

SanDisk

16.9

23.4

40.4

16.3%

12.7%

Toshiba

20.2

24.7

44.9

18.2%

13.4%

Total

63.0

184.0

247.0

Click to enlarge

Where does this all lead? In my mind, the takeaway is that demand is the key, and even at the middle scenario of 35% growth, there are capacity decisions that once made would overwhelm demand and sink margins, especially in 2017. If, for example, Samsung decides to defend its 3D share and builds more 3D capacity in 2016 and 2017, it could totally overwhelm demand growth and throw the industry into oversupply. So too could any of the oligarchs. Clearly, unprecedented restraint would have to be shown by the industry.

Is there a chance that the IM partners could still do well even in a demand dearth environment because of a product advantage? Well, yes, but there is no way we can have any faith at this point that such an advantage exists, let alone is maintainable.

We simply don't know if IM or any supplier has a bankable product advantage. I've read plenty of commentary about the various suppliers' 3D designs, but I have seen nothing conclusive.

Are we looking at this too narrowly? Since SSDs are rapidly overtaking mobile as the largest consumer of NAND, maybe a supplier could build competitive advantage in the package (i.e. controllers, flash management firmware and NAND together) that would add so much value that a premium price could be obtained? If so, Intel is a good bet to be the beneficiary. So sure, it's possible, but one has to wonder how long standing an advantage that this approach would prove to be if necessity dictated that all the suppliers were focused on differentiating their products in this manner.

If anybody is to claim the overall high ground from a package perspective, my money is on Intel. It truly is the wild card in this hand because of its unique position in the data center/enterprise market. If anybody can wring adequate gross margins (50-60%) in this market, one would think it could. WD (the old SanDisk) will give Intel some competition in that space as will Samsung, but one would think the strength of Intel's packaging, IP, and system level integration would provide key competitive advantages. Samsung's brand and momentum in the client drive market is not to be discounted either. The issue there is margins that are unlikely to match those in the enterprise.

Where does that leave Micron and SK Hynix? Frankly, I have no idea what SK Hynix is doing in this market. Its design is a derivative of Sanshiba's BiCS approach and, to the extent that BiCS gains traction, it could have an attractive alternative for the client market (There is a good reason for its similarity of product - SK Hynix stole the IP).

Micron is the swing player in the market. To the extent that the IM 3D design rates well in competition with the other suppliers' chips, Micron could harvest some relatively profitable business on the merchant side. Can it swing 30-40% gross margins in this business? Not unless demand is significantly in excess of supply. The wild card is its SSD business, and by that I mean the DC/Enterprise offerings where to date Micron has fared miserably. Given its historically poor performance in the client SSD market and Samsung's dominance there, I give it a little chance of winning any profitable business in this segment. Once again, a strong uptick in demand could certainly help its situation, but we can expect Samsung to defend its share fiercely against all comers.

All that being said, we must not forget that any profit in the NAND business is found money for a company that has consistently lost money (or barely broke even) over the last few years. Showing revenue growth and decent operating profits in this area would be huge for a company that desperately needs a return on the massive CapEx investments it is making in 3D and 3D XPoint.

What are the odds it will happen? It all depends on overall market growth. 35% and over is likely to be very good news for the business as long as it doesn't have a major hiccup with 3D performance or production. Below that level, watch out!

Let's wrap this up. I don't like what I see, especially for anybody not named Intel and maybe Samsung. If I had to list my concerns in order, they would be as follows:

  1. Samsung's 25% demand forecast and Xian pull back. Ugly!
  2. Micron's 35% growth forecast for NAND. Ok, but barely enough.
  3. The Intel Dalian plant capacity coming on late this year. Intel better be right about market growth!
  4. Jim Handy's "the sky is falling" forecast for 2017-18. At least one half of the projection seems right - the upcoming flood of bits from 3D. Will a paucity of demand make the other half of the prediction true as well?

Against these concerns, I weigh Ernie Maddock's optimism ("more NAND capacity will be needed") and Intel's truly crazy market growth forecast of 3X TAM by 2018 (Whatever they are smoking I'll have some of that…).

Are you feeling lucky? You better be if you are going to be investing in anybody but Intel in the NAND business. We all need to be prepared for the "harder alternative."

Disclosure: I am/we are long INTC.

I wrote this article myself, and it expresses my own opinions. I am not receiving compensation for it (other than from Seeking Alpha). I have no business relationship with any company whose stock is mentioned in this article.

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