Intel/Micron: How IC Packaging Will Drive Them Together

| About: Micron Technology (MU)

The investment thesis for this article is: Intel (NASDAQ:INTC) has no choice but to acquire Micron (NASDAQ:MU).

I've thought about this article and how to present the thesis in an understandable way for over a week, so here we go:

We are all aware of the consolidation in the memory business; there are three major DRAM suppliers and four major NAND suppliers left. DRAM is Samsung (OTC:SSNLF), SK Hynix (OTC:HXSCL), and Micron. NAND manufacturers include those three plus Toshiba/Sandisk (SNDK).

What is less well understood is how memory is used today. The PC applications still use DRAM in memory modules that are plugged into a mother board. The PC memory business is now less than half the DRAM business. Over half of the DRAM business is used in non-PC products, with smart phones and other mobile devices making up the majority of that consumption. The way that DRAM is used in smart phone is entirely different than in a PC. Virtually every smart phone uses what is called a PoP, or Package on Package, where the phone DRAM is soldered or otherwise physically bonded to the application processor ((NYSE:AP)) in a module that is three packages high (in the case of 1GB phone), and soon to be five packages high as smart phone DRAM move to 2GB.

The Ideal situation is for one manufacturer to supply the complete module, AP and DRAM, as Samsung does. Here is a video that will take you through some of the 2.5D and 3D packaging technology in use and being developed today. At minute 22 the presenter hits the crux of the problem, "If multiple companies supply die for the module and there is a quality problem, who do you blame?"

That Apple has split the AP module with the AP being supplied by Samsung and the mobile DRAM being supplied by Micron (Elpida) gives a hint about how desperately Apple wants to get away from Samsung.

NAND memory has some even crazier packaging approaches. At minute five in this video, you will see a wire bonded stack of 32, 32Gb NAND die to make a 128GB assembly. If you added a controller chip you would have a 128GB solid state drive in a single one inch square package. Since the picture of this ridiculous module was taken, the industry has progressed to 128Gb chips, so that only eight die would need to be stacked to get 128GB. Soon that will be a stack of 4, 256Gb die.

If you watch the videos through you will see the progression of one die per package to multiple die per package (side by side and stacked) and finally to stacked die using TSVs (Through Silicon Vias.) All of the packaging technologies prior to TSVs provide the main advantage of small area size. The performance gains in terms of power and speed performance are fairly minor. Multi-die assemblies made with TSVs, however, give almost shocking improvements in both speed and power.

If you go back to the first video and go to the last few seconds you will hear the speaker say that the very first TSV products will, "ship next year." Since the video was made in September of 2012, the first TSV products should be here. And it is; it is the Micron HMC (Hybrid Memory Cube). The HMC was a joint development of Intel and Micron and first demonstrated back in 2011 at the Intel Developers Conference. The HMC apparently has 15 times the bandwidth and 30% of the power of traditional memory modules while consuming only 10% of the board area.

It doesn't take a genius to figure out that Intel is the process technology driver behind the HMC and TSV technology in general. Intel gains immensely from the performance gains of TSV technology in their High Performance Computing chips, their high performance server chips, and high performance networking chips. This same technology, run more slowly, will enable ultra-low power consumption in mobile devices.

If interested, here are some more videos on processing and packaging:

In order to take full advantage of the combination of logic and memory die through TSV technology, Intel would, ideally, control the manufacture of both logic and memory.

Intel and Micron can accomplish this by a large expansion of the existing memory Joint Venture, or an outright purchase of Micron by Intel.

How do they do this?

I would guess a stock swap would be the method. Intel could pay as much as $41/share for Micron and still achieve neutral dilution.

Here's the numbers:

Intel has 5 billion shares outstanding, give or take, and a stock price of $24 today. The consensus for Intel 2014 earnings is $1.92 or $9.6 billion.

Micron has 1 billion shares outstanding, give or take, and a stock price of $17.65 today. Bernstein Research is estimating $3.31 for Micron 2014 earnings or $3.31 billion.

If we combine the earnings for $12.91 billion and divide by the $1.92 expected Intel earnings, we come up with 6.72 billion total shares for the combined company. That means that Intel could spend up to 1.72 billion shares for Micron and still have neutral earnings dilution. 1.72 billion Intel shares at $24 gives $41.28 billion for micron or $41 and change for the Micron shares.

For Intel to deliver the future technological performance that they must, the company needs to control memory for inclusion in the burgeoning Multi-chip Module business.

Intel should buy Micron and they should do it very soon before the real earning power of Micron becomes more generally understood and the price gets out of reach.

Disclosure: I am long INTC, MU. I wrote this article myself, and it expresses my own opinions. I am not receiving compensation for it (other than from Seeking Alpha). I have no business relationship with any company whose stock is mentioned in this article.

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