Intel (INTC) Presents at JP Morgan 46th Annual Global Technology, Media, and Communications Conference (Transcript)

Intel Corp. (NASDAQ:INTC) JP Morgan 46th Annual Global Technology, Media, and Communications Conference May 15, 2018 10:20 AM ET

Executives

Murthy Renduchintala - Chief Engineering Officer & EVP, Intel Corporation

Analysts

Harlan Sur - U.S. Semiconductor & Semiconductor Capital Equipment Research, J.P. Morgan

Harlan Sur

All right, good morning and again welcome to J.P. Morgan's 46th Annual Technology Meeting Communication Conference. My name is Harlan Sur. I'm the Semiconductor and Semiconductor Capital Equipment analyst here for the firm. I'm very pleased to have Murthy Renduchintala, Group President of Intel's client and IoT groups, overseas technologies systems architecture and he is the Chief Engineering Officer for Intel.

So before we get started, the team would like me to read the Safe Harbor Statement. Today's presentation contains forward-looking statements, all statements made that are not historical facts are subject to a number of risks and uncertainties, actual results may differ materially, please refer to Intel's most recent earnings release form 10-Q and 10-K filing available for more information on the risk factors that could cause actual results to differ. If Intel uses any non-GAAP financial measures during the presentation, you'll find it under website intc.com the required reconciliation to the most directly comparable GAAP financial measures.

So let me just move over here very quickly. Murthy, thank you for joining us today.

Murthy Renduchintala

My pleasure.

Harlan Sur

So, you wear a lot of hats within Intel, and so I think that you know Head of the Computing team, IoT, Technology, the Architecture Group maybe what you can do is maybe start us off with explaining your role and responsibilities with Intel's organization? What parts of the Company directly report to you and so on?

Murthy Renduchintala

Sure, I'd happy to do that. So I have a role in Intel has two dimensions, as you've quite rightly stated Harlan, there is a technology and engineering dimension and there is a business dimension. Let me start with the technology and engineering side first. My overall remit is to help Intel, deliver leadership products in all the markets it chooses to play, and that comes from aligning our technology and process development, our product architecture, our silicon engineering and execution as well as defining an execution on our product roadmaps.

So under my engineering guys, I have all of our semiconductor development activities we call TMG as well as all of our systems architecture activities as well as all of the capabilities to execute and deliver those in the silicon and packaging environments. And then on the business side, I provide business oversight to Intel's client and the connectivity businesses which roughly make up around half of Intel's revenues.

Harlan Sur

I should maybe ask you so as Head of the Systems Architecture team, you are not only responsible for the client side but you are also in charge of its worthy datacenter side of it as well.

Murthy Renduchintala

Yes, I mean apart from a few small exceptions I am pretty much responsible for all of Intel's engineering and technology activities.

Harlan Sur

You've recently added some pretty good firepower to your team. You hired Jim Keller away from Tesla to lead the Company's silicon engineering efforts that includes SoC development and integration. I think that the press release mentioned that he's looking forward to working at Intel on things like CPU, GPU accelerators, and other products that are focused on data centric areas. And then last year, you've hired Raja Koduri, a well respected leader in graphics and GPU technology. Can you just help us understand, what's are the strategic priorities these gentlemen will be undertaking in more detail and based on their backgrounds, I'm presuming that they'll be working on discreet GPUs for gaming and also maybe accelerating your AI and accelerator roadmap efforts, but want to hear it from you?

Murthy Renduchintala

Well, first of all, I am really excited to have Jim Keller and Raja as part of the technology leadership team, clearly industry acknowledged experts and veterans of both innovation and product execution. My key design on bringing Jim and Raja into Intel was really to supplement a sports analogy where sometimes a great coach can make a great team even better, and I think that the advantage and privilege of having Jim and Raja coming on board is really part of my drive to get deep technical leadership into Intel to actually take a great engineering team to make it even better.

In terms of roles and responsibilities first of all, Raja is really focused on driving product architecture, product construction and driving the definition of our product roadmaps with our business units. Jim is really focused on driving core silicon engineering and execution. However, having said that, the boundaries between the roles is very diffused. In fact nobody within the engineering leadership team that, that I drive really has an overly constrained box in which they live. So, we -- I am really hoping that the chemistry between Raja, Jim and the rest of the Intel technical leadership team really enables us to move our ability to delight our customers to another level.

In terms of the details you talked about Harlan. Yes, I think that Jim clearly has a pedigree where he focused on developing micro-architecture and core CPU architectures. Raja has come from a background where he's built up both engineering and business scale in a discrete graphics environment and as part of their overall remit, they’ll continue to focus and execute in those dimensions as well.

Harlan Sur

Great, if we look at over I’d say the past 12 to 18 months, there’s been a lot of transformation at Intel, many good things obviously where we’ve seen reacceleration of the growth rates, we’ve seen the move of the Company from what you guys term to be PC centric to data centric. We’ve seen significant profitability improvement and improvements on free cash flow. At the surface, I mean obviously these are all great things. Underneath the hood, I'm sure they’ve come with a set of challenges and hurdles and we’ve all seen the good results. I’d like to understand from you what were -- as a part of driving a lot of this strategy and getting into the waves. What have been -- what are some of the challenges in helping Intel move to more to sort of more data centric business model?

Murthy Renduchintala

Yes, so again let me just amplify the details behind what you said. Yes, Intel is very much in the middle of a data centric transformation strategy. And what that really means is that, we envisage delivering the capability to process, distribute and store the ever burgeoning amounts of data and information that make up our professional and personal digital lives. The explosion of data as we see in our lives is on an unstoppable curve. And for us our the ability to exploit that with the right silicon architecture to software architecture is to process, distribute and store that capabilities is really important.

Let me imagine a world where -- and we call it our Northstar vision. Imagine a world where every consumer has access to 10 petaflops of compute and 10 petabytes of storage within 10 milliseconds of access. I think that's kind of like the overarching vision of how the digital infrastructure, the future will develop. Everything will move closer to the edge and compute capability storage and latency of infrastructure around wireless communication networks is going to be absolutely vital.

And as you try and transpose that vision of the future on the heritage of Intel, clearly, there is a significant adaptation required in building both the technical capability as well as the prowess to compete in many different markets where we've traditionally been able to focus on. And I think the most important challenge has really being for Intel to understand that we have to compete in a manner with uncompromising focus on two positive execution in different markets that have different requirements for excellence and execution.

The PC market, the datacenter market, the IOT market, the connectivity markets all are characterized by different sets of competitors, different market cadences, different customer expectations. And the ability to have a diversified view of product development and how we delight a customer as opposed to a monolithic perspective which there is one large huge market. It's clearly a very, very important challenge and transformation for the Company to undergo internally.

Harlan Sur

Let's talk about the Company's sort of core leadership in manufacturing technology. I mean obviously Intel was the foundational architect of Moore's Law. The team has had a solid track record of driving performance, combination of you know your leadership in driving Moore's law and silicon process technology as well as architectural innovations as well. And you know just a little bit over a year ago at your Investor Day, the team described Intel being on track to scale logic scale area at a rate of 0.5x every two years, this is from a process technology perspective. Moreover at that event, you discuss Intel having an approximately three-year lead when versus competitors launching equivalent 10 nanometer processes.

Fast forward to today, Intel has delayed the high volume ramp of 10 nanometer, and with the leading foundry guys in the market bringing 7 nanometer products to the market maybe second half of this year arguably with similar sales and area type of benefits, as 10 nanometers, the markets getting a bit concerned that the gap is closing, and this potentially leads to the gap also closing between you and some of your competitors that take advantage of those process technology. So first off, could you just help us understand why Intel has made the decision to delay the 10 nanometer technology?

Murthy Renduchintala

Sure. Well and first of all, I think that silicon leadership is really important in as much as it supports product leadership. Silicon leadership in and of itself is only one of the aspects required. First of all Intel is a product company, it's not necessarily focused on being a merchant foundry. And in addition to silicon leadership, you really also need right architectural capability, the ability to execute silicon programs to predictable timelines, and you need an arsenal of capabilities and packaging, assembly and test technologies. So bringing all of those the weather is really what drives product leadership.

In terms of 10-nanometer, we are shipping 10-nanometer in low volumes. I think that if you go back to when we originally defined the recipe of 10-nanometer back in early 2014, we defined some very aggressive goals for our second-generation hyper-scaling. We targeted a 2.7x scaling factor, from 14-nanometers which was in the very stages of product ramp at that point in time. And 14-nanometers with in and of itself of 2.4x scaling on 22 nanometers, so clearly our engineering team in TMG had very, very ambitious goals in terms of the transistor scaling required.

That required a lot of innovations to come together and maybe those plans were a little bit more aggressive in hindsight than was ideal. And so, therefore we had a little bit of a greater challenge in bringing 10-nanometer to market than we had originally expected. However, the issues that we faced in getting that to prime time yield and not fundamental. We know what to fix and we’re busy going about fixing that. In the meantime, we found tremendous intra-node capability within our 14-nanometer process.

In fact from the very first generation of our 14-nanometer to the latest generation of 14-nanometer product, we've been able to deliver over 70% performance improvement as a result of those intra-node modifications and desirable changes. And that's quite frankly Harlan has given us the ability to make sure that we get 10-nanometer yields right before we go into mainstream production. And so, therefore we’re comfortable with the 14-nanometer roadmap that will give us leadership products in the next 12 to 18 months, as we seek to optimize the cost structure and yields of our 10-nanometer portfolio.

Harlan Sur

I think the team sets 10-nanometer should be ready for production, 2019, any sense of whether that’s more first half waited or second half waited given the progress that you’re making on the manufacturability front?

Murthy Renduchintala

So, as I said, we’re shipping 10-nanometer products today. I think for me, I’ve gone -- I’ve given ourselves no specific timeline, again it's when the economic timing makes greater sense for us in terms of when we hit the right point in the yield curve. So, I think we’ll take that it with a little bit of wait and see, but certainly in my mind we’ll be ready as soon as we believe there is a significant capability to cross over on cost structure point of view.

Harlan Sur

I think the other question that we get from the investors is obviously you have your flagship 7-nanometer technology that follows 10-nanometer technology. So based off of the push out intent, should we anticipate that the follow-on 7-nanometer technology has also been sort of pushed out in time as you think about your roadmap?

Murthy Renduchintala

No, I think that would be a premature assumption. If you look at the technical risk factors in 7- versus 10-nanometers, they’re very different. 10-nanometer is basically with the generation that was really focusing on delivering 2.7 ex-scaling in an environment that wasn't assisted by EUV. We had to go to self aligned cord fastening which in on itself is both complex and time consuming. As we moved to 10, we've been able to deliver a recipe with the quite diversified risk profile.

And as of today, we’re deep into product development on 10-nanometers, and we’re very, very pleased with the progress. One thing I will say on 7 is we’re also taking a slightly different balance point between density, performance and power and schedule predictability. So while we're going through the final trials and tribulations of getting 10-nanometer into really high volume. Those challenges are likely be correlated from the challenges we face in severance. So I wouldn't characterize any implications to severance as a linear shift out.

Harlan Sur

And then as it relates to maintaining your 90% plus share leadership in the datacenter segments of the market, the big question there is. Has the timing of the 10-nanometer server and FPGA programs been pushed out as well? I know that the team was originally planning to drive servers on their 10-nanometer plus, plus technology. Is that something where you know two scenarios I can see? Intel keeps the same 10 nanometer server timing intact but instead of 10 plus, plus maybe rolled it on an 10 plus or you actually do push out you know the 10 nanometer server program ramps? How do you think about that?

Murthy Renduchintala

Well, clearly we haven't disclosed our 10-nanometer server roadmap in any detail yet, but quite frankly I'm very excited by the product pipeline that we have going forward in our server roadmap. I'm equally excited by the products we would be launching this year and next year in 14-nanometers on our datacenter roadmaps. Again I want to bring the discussion back to products leadership and the ingredient of silicon leadership plays in that, but also other key enabling technologies in the data center. So if you look at the product pipeline we have in our datacenter area.

I'm really excited by other technologies and innovations that we are pending to the overall gamete of capabilities we are providing. For example what we are doing with respect to connectivity with ethernet and silicon photonics, what we're doing with in storage with 3D cross point in -- and then if you think what we are doing in terms of pending customer accelerate to silicon or even FPGA capability to our complete capability.

So the abbreviation of all of those technologies together with what I think is seller execution on our 14-nanometer roadmap is very much focused on meeting the needs and commitments of our customers. Because the confidence, we'll continue to see a great deal of vibrancy in our datacenter roadmap. 10-nanometers will come along at the appropriate time and I think 14 will be more than capable of comparing our expectations as we transition in that technology in '19.

Harlan Sur

Yes, you know the 14 -- to your point the 14-nanometer plus, plus line of products last year really did deliver significant performance improvements. so like part of it was the silicon technology leadership, but also you have some major architectural advancements. So as you think about the current line of products for this year that are going to be 14-nanometer. Is it -- are you going to have a 14-nanometer let's say plus, plus, plus technology combined with architectural improvements? Or how do you think about the 14-nanometer technology this year.

Murthy Renduchintala

I mean it's a great question. First of all, I have the experience of having lived almost 20 plus years in the fables environment working with many commercial foundry's progress, and I'm also seeing Intel's first hand and as of the last two or three months having responsibility for the foundry activities as well. And I think one of the things that really struck me when I first came to Intel was just how beatrice no transactions were all in one note then roll out into the next note. And one of the things that the 10-nanometer experience has provided us where there is a eye-opening learning lease within Intel's about how much goodness can be achieved intra-node.

Of course when you work in the TSMC or Samsung or global foundries environment, that’s somewhat taken for granted. But in the Intel regime that’s something that was really-really very eye-opening for us in 14-nanometers. And what we really found was that the intra-node improvement there on the table to grasp, but actually quite significant. Let me go back to a statistic I shared with your earlier Harlan, that if you look at the first product we launched in 14-nanometers and the latest generation of products we’ve launched in 14-nanometers, the Coffee Lake series of products.

With a mixture of process improvements and design rule changes in 14-nanometers as well as architectural improvements, we've been able to deliver nearly 70% improvements in system-level performance. That's a couple of Moore’s Law, generations of technology. So again, that's something that Intel will continue to focus on, that isn’t a one off strategy for us. We’ll continue to see nodes living longer and an overlap of one node as we transition into another node and it will be a case of make before break, mix and match type capability. So, I think you’ll see that being a greater and greater part of our product roadmap going forward.

Harlan Sur

Great, yes, and I think you’ve got up -- you’ve brought up a point of where it’s just not process, it’s not just architecture, there’s other enhancements like packaging technology, multi-die. And to that end, Intel has discussed novel approaches for packaging and for example, Intel's embedded multi-die interconnect bridge, what expense call EMIB is a pretty innovative approach the team has used with your Stratix 10 FPGA products right where you have -- your Stratix 10 FPGA chip.

You’ve got set of transceivers that are manufactured by foundries and DRAM which obviously fits off chip as well, but these are all combined into a very compact high performance single package solution. We can envision 10-nanometer logic components for example, at some point in the future sitting next to 14-nanometer component, analog, memory kind of all coming together again in the same package, how is Intel’s EMIB technology, similar traditional -- or similar superior to traditional 2.5D solutions that use things like silicon interposers, Through Silicon Vias and other types of multi-die packaging techniques?

Harlan Sur

Yes, this is an area that’s really really exciting to me in terms of how it’s going to transform the way we do product development. I think what you’re going to find is really transformative technologies being delivered by Intel specifically and maybe others, that really drive the traditional monolithic view of the world into a more evolved space. As part of our data centric strategy, one of the things we’re really focused on is moving for example our data center products nearer to the beginning of the launch of a process node.

And as many of you know, a lot of our data center silicon constructs have traditionally been very large, greater than 500 to 600 square millimeters. And that's always been a challenge in being therefore able to ramp those products at the very inauguration of the node. You're really fighting the improvement of defect density and therefore larger dive very early in the process node, don’t necessarily lend themselves to high yield.

Now using techniques that you’ve talked and we call it a mix-and-match approach. One of things we’re really focusing on is how we actually can target IP that really benefit from process scaling much more targetedly in early node ramps. Not all capability you see on a standard monolithic SoC benefits equally from logic scaling, the process element like the CPU ad GPU clearly do, but there are many other elements of IP on as SoC that aren't necessarily always break as the bleeding edge have logic transition technology or mixed signal IP, high speed IO, memory controllers they aren't necessarily as benefitting from logical saving.

So what Intel has done and EMIB is a first example of that is the construct silicon architectures and using techniques like EMIB and other techniques that would become more visible as we go through the rest of the year and early next year. To really create the ability to have core IP in different notes, but using construct that essentially provides virtual monolithic integration. So think of this scenario for example where I can move GPUs and CPUs into the latest and greatest process note, but leave a lot of the high speed interconnect and inter-chip connection fabric in a legacy node.

That's why I'm able to break the design into smaller pieces of silicon that yield much earlier on the process curve, but I'm also not necessarily constrained by launch of a new product by moving all of the IP at the same time into a new node. I can take a more graduated approach of doing that, and that's why you are going to see from Intel going forward as the client rightly said. You'll see silicon constructs going into the future that used very advance packaging techniques to be able to allow a mixed and match approach of different silicon technologies brought together in a unique packaged capability to deliver virtually one of the capability.

And let me just say things like EMIB operate through technologies because this is not another version of multiyear package. This is really silicon bridge interconnect which allows you to essentially achieve virtually monolithic performance in a disaggregated approach. And I think what you'll find with technologies such as EMIB and even newer technology going to be launching in the future, we will see much lower power, much lower cost and much lower latency than traditional interposer techniques that others have spoken about in the competitive environment.

Harlan Sur

Great, that's focused on the, your responsibilities on the client compute side of the business. Security and let's focus on the security concerns right, so investors more recently haven't been too concerned around specter and meltdown nevertheless remember back at CES, we had Gregory Bryant, GB Head of -- works for you and subhead of the client computing division discuss having fixtures in silicon in 2018. Can you just give us an update on what Intel is doing from a silicon side perspective to address the side channels vulnerabilities?

Murthy Renduchintala

Sure. Well again security remains a top priority for Intel as we communicated earlier this year, we've been able to pretty much provide micro code patches and mitigations for almost all the product that we have launched in the last nine years, both on the datacenter and the client side. Then as you quite rightly stated as we go into second half of this year, we will provide hardware level mitigations for our 14-nanometer product that launched in the second half of the year. The Cascade Lake server product range as well as the Whiskey Lakes client product range.

One thing I will say is, the last few months have been tremendous example of the industry coming together, putting customer trust, customer security and collaboration right to the floor. And I think that’s something that the industry as a whole is really going to benefit from a certain degree of complete partnership in making sure that security isn’t necessary treated as a dimension of competitive advantage as when where we’ve a collective responsibility to make sure we provide security in everything we do as an industry.

Harlan Sur

We just had -- we just had AMD present kickoff the conference earlier this morning, and they appeared to have a pretty strong lineup on the compute side across their desktop, mobile and commercial product lines this year. They’re getting ready to launch their second generation architecture called Ryzen, How do you think about Intel's ninth generation products versus kind of your competitors’ second-generation products?

Murthy Renduchintala

Well, of course, we always are vigilant about competition and peak performance is built on having aggressive competition. That being said I think we're very-very pleased with the product portfolio we’ve been able to deliver on 14-nanometers as well as the expansion of our eighth generation portfolio. I think across a number of major benchmarks, Intel has been able to demonstrate leadership performance. I think that overall system-level performance is what matters to end-users. I think the latest Coffee Lake 8,700 generation of processors compared to the Ryzen 2,700 range is a good comparison point.

Overall, I feel really upbeat about our product roadmap going into the rest of this year and early ’19, a lot of really exciting things to come. As I said, we’ve been able to find tremendous amount of intra-node performance on 14-nanometers and we’ll look to build upon that as we transition to 10. So I'm excited about where we are on eight. I'm excited about where we are in nine, clearly very aware of the competitive environment, and I am sure we’re going to need to deliver our very best in order to make sure we maintain our lead.

Harlan Sur

Let’s talk about gaming, that’s always been the bright spot. Last few years actually for as an Intel team, as it relates to your very high end CPU products. I think the most recent forecasts from -- from guys like NPD is that the gaming market, software and hardware at least here in the U.S., grew about 18%, 19% in 2017. So clearly, gaming continued to be a growth segment for the Intel. How should we think about relative to the numbers that I threw at you? How should we think about growth in Intel's gaming related SKUs 2017 or maybe sort of first half of this year? Is it trending in that sort of kind of double-digits kind of year-over-year growth rate? And what is the team doing this year to further kind continue to lead in the enthusiast segment of the market?

Murthy Renduchintala

Harlan, you’re spot on. I think the whole gaming environment is a huge area of growth for us. Regarding the numbers, I think if you look at global retail sales across gaming, notebooks and desktops, we’ve seen something like a 21% growth year-over-year. That's Q1 ’17, to Q1 ’18 and we see no reason for that growth to stop. In fact we're seeing many more SKUs, even if a higher mix amongst the product roadmaps of our OEMs and clearly everyone sees this is a as a really exciting growth area for us. I think beyond traditional gaming, we're seeing a tremendous amount of interest and growth in eSports as well.

I think today there are something like 380 million eSports fans and we expect that to grow to nearly 600 million by the 2021 environment, and what that's driving is much higher specs in the platforms around which people indulge and engage in those environment which is great for us. And we're a premier partner with Activision Blizzard in The Overwatch League, and we're also very engaged with the NBA in eSports environment. So I think eSports and the degree to which that drivers, higher performance specs in gaming platforms is going to be really good use for the industry and for us.

Harlan Sur

You also have responsibilities for the cellular modem efforts at Intel hugely successful in 2017. Can you just give us an update on the 75 to 60 modem that is the first internally manufactured modem by Intel? How is the sampling progressed? And when should we expect -- have you qualify with the carriers? And when should we expect these products to ramp into high volume?

Murthy Renduchintala

I think that's another very good new story for Intel and we're really pleased with the progress and strives we've made in our modem development, and I would say that benchmarking against the firsthand experience to what it takes to be the best. I think you'll see in the second half of this year, the launch of Intel's first gigabyte LTE product with global CDMA capability that I think really drives feature parity, if not in some areas feature excellence across the broad benchmark of -- broad set of benchmark metrics. And that will be I think the first of many to come so very, very pleased with and the progress of our modem organization and 75 to 60 should be in high-volume production before the end of this year.

Harlan Sur

For the end of this year, okay, well.

Murthy Renduchintala

Maybe the second half of this year, well, before the end of the year.

Harlan Sur

Great, we are just about out of time. Murthy, thank you very much and good luck here in 2018.

Murthy Renduchintala

Thank you, Harlan, my pleasure. Thank you.

Question-and-Answer Session

End of Q&A